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This is the third post in a three part series that examines the problem of SSN and explores methods of reducing SSN in your designs.
DBI is an optional feature in DDR4. If DBI is enabled, then when the driver (controller during a write or DRAM during a read) is sending out data on a lane, it counts the number of “0” (logic low) bits. If the number of bits driving “0” in the lane is five or more, then the entire byte is inverted, and a ninth bit indicating DBI is asserted low. This ensures that out of the 8 DQ bits and the 9th DBI bit, at least five bits are “1” during any given transaction. This also ensures that out of the entire data lane, the maximum total number of signals transitioning is either five 1’s to 9 1’s or vice-versa. There can never be a situation where all bits go from 0 to 1 or from 1 to 0.
So, if we run the same data bus with data patterns which would be the output of the DBI logic, we get the waveform for DQ0 in Figure 1.
Figure 1: DBI processed bit patterns with improved PDN
The eye-height for DQ0 in this case is over 315mV, which surpasses all the other conditions. Now, since DBI is data dependent, the benefits of DBI may vary and need to be analyzed before implementation.
Thank you for following our blog series on SSN—we hope you find this information valuable and share your thoughts in the comments. With a good design of the PDN, and possibly selecting the DBI feature in DDR4, SSN shouldn’t be a bother in your design. If you’d like to learn more about SSN and similar challenges, check out our white paper “DDR4 Board Design and Signal Integrity Challenges,” which was recently nominated for the DesignCon Best Paper Award.
I-Connect007 Editorial Team
What is design with manufacturing and what does true DWM look like in operation? In this interview, I-Connect007 columnist Dana Korf explains what it will take to achieve total communication among all the stakeholders in the PCB development cycle. He also stresses the need for everyone involved in PCB design and manufacturing to stop making assumptions, even at the risk of being labeled as “that guy” who asks too many questions.
Kyle Burk, KBJ Engineering
As mentioned in the May issue of Design007 Magazine, design is performed, at times, in a vacuum. But it doesn’t have to be that way. Whenever circumstances allow, design should be performed by communicating with all stakeholders throughout the design process, hence the emphasis on the word with in DWM. Communication can occur through personal correspondence such as email and voice conversations or through more formal design meetings—in person or through videoconferencing. No matter which means of communication you prefer, it’s important to communicate early and often with stakeholders involved in the downstream processes as you bring your project to realization.
Andy Shaughnessy, Design007 Magazine
Despite all of the talk about the need for communication between designers and manufacturers, many PCB designers still do not talk with their manufacturers for a variety of reasons. Altium and MacroFab aim to change this dynamic. In this interview, Ted Pawela, chief ecosystem officer of Altium and head of Altium’s Nexar Business Unit, and MacroFab CEO Misha Govshteyn, discuss the new Altimade manufacturing service that Altium is introducing in partnership with MacroFab. Ted and Misha provide an overview of the Altimade process, how it links designers to fabricators, assembly providers, and component distributors, and they explain how it could pave the way for true design with manufacturing, or DWM.