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SiliconPipe Announces New Interconnector Design Tool
September 19, 2006 |Estimated reading time: 2 minutes
SiliconPipe announced the availability of a prototype version of its new Interconnector(TM) integrated design tools. The Interconnector design suite is a software tool that enables silicon and system architects to design and test chip-to-chip interconnections that support signaling rates of up to 25Gbps. The interconnect designs utilize SiliconPipe's open source, licensable IP design components, which include patented IC packaging solutions, channel layout and electrical connectors.<?xml:namespace prefix = o ns = "urn:schemas-microsoft-com:office:office" />
"Interconnector tool is unique among design tools. It offers system and silicon architects the ability to analyze chip-to-chip interconnections early in the design phase rather than making multiple passes using signal integrity tools with final chips and initial PCBs." said Joseph Fjelstad, SiliconPipe CEO. "With Interconnector, the product designer gets the data they need to design custom chips, lay out signal channels either on the PCB or OTT format and, as well, to select connectors. It will also allow the user to rapidly run "what if" scenarios to speed up characterization and selection in the design process"
How It Works
The user assembles an interconnect system by selecting ICs, channels and connectors and provide system details via parameters. They then add test components (such as a signal source and a signal analyzer) to analyze performance. Triggering the signal generator creates both source data (wave form) and sink data (eye diagram). Interconnector uses a single channel to connect the two chips predicated on data from SiliconPipe's previously demonstrated and tested Sidewinder project, where a 30-inch, two-connector channel through a copper backplane interconnect proved capable of a single-channel 20Gbps signaling rate.
SiliconPipe intends to make the production version of Interconnector freely available on its website (www.SiliconPipe.com). Interconnector requires Java on the host computer. The prototype is not yet fully featured to do analysis. The first version is being offered to solicit user feedback, thus enabling users to help shape the production version to their needs. Future versions of Interconnector will use S-parameter data from tests of actual materials and structures.
To evaluate the prototype, send an email to interconnector@siliconpipe.com.
About SiliconPipe
SiliconPipe, founded in 2002 in <?xml:namespace prefix = st1 ns = "urn:schemas-microsoft-com:office:smarttags" />San Jose, California, is an Open Source Intellectual Property Company that designs and integrates complete high-performance system-interconnect solutions. SiliconPipe's suite of novel patent-pending high speed copper based technologies include Off-the-Top (OTT(TM)) and Stair-Step (SSP(TM)) IC packaging solutions; low-skew parallel line interconnects for memories, AirCore(TM) cable and high-performance copper backplanes. These technologies are significant improvements over traditional interconnect concepts and provide cost-effective solutions that meet the performance requirements of next-generation high-speed products. SiliconPipe has over 120 patent submittals. For additional information about SiliconPipe, visit their website at www.siliconpipe.com .
For additional information, please contact:
Joseph Fjelstad
SiliconPipe, Inc.
992 De Anza Blvd.
San Jose, CA95129
Telephone: (408) 973-1744
Fax: (408) 973-8032