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This article studies the impact of dielectric thickness on crosstalk for transmission lines in single-ended and differential mode on outer (microstrip) and inner (stripline) PCB layers. Crosstalk analysis is performed in 2D simulation and S-parameters are subsequently observed.
Introduction to Crosstalk
Crosstalk is an unintentional electromagnetic (EM) field coupling between transmission lines on a PCB. This phenomenon becomes a major culprit in signal integrity (SI), contributing to the rise of bit error occurrence in data communications and electromagnetic interference (EMI). With the existence of mutual inductance and capacitance between two adjacent transmission lines on a PCB, crosstalk has become more severe due to the shorter signal rise/fall times at today’s higher data speed rates.
Crosstalk can be minimized by routing the PCB traces further apart and reducing the dielectric thickness between PCB trace and reference plane. We will observe how a PCB’s dielectric thickness affects the signal crosstalk. All crosstalk analyses are carried out in 2D simulation using Mentor’s HyperLynx.
To read this entire article, which appeared in the August 2018 issue of Design007 Magazine, click here.
Yuriy Shlepnev, Simberian
The usual way of signaling through PCB interconnects is a two-level pulse, an encoding of 1s and 0s or bits, named NRZ (non-return-to-zero) or PAM-2 line code type. Increasing the data rate with the NRZ code type presents some obstacles. For a 28 Gbps NRZ signal, the bit time is about 35.7 ps with the main spectral lobe below 28 GHz. For a 56 Gbps NRZ signal, the bit time is about 17. 86 ps, with the main spectral lobe below 56 GHz. One can feel the problem already: Getting PCB interconnect analysis and measurements up to 56 GHz and beyond is very challenging, to say the least.
Yuriy Shlepnev, Simberian
A typical PCB design usually starts with the material selection and stackup definition—the stackup planning or design exploration stage. How reliable are the data provided by the material vendors and PCB manufacturers? Can we use these data to predict trace width and spacing for the target trace impedance or to calculate delays or evaluate the loss budget?
Chang Fei Yee, Keysight Technologies
This article briefly introduces the 4-level pulse amplitude modulation (PAM-4) and its application in 400 Gigabit Ethernet (400GbE), to support the booming data traffic volume in conjunction with the deployment of 5G mobile communications. Furthermore, this article also highlights the essential pre-layout effort from signal integrity perspective for physical (PHY) link design on a PCB, including material selection, transmission line design and channel simulation to support 56Gbps data rate that paves the way for seamless communication in 400GbE.