Quiet Power: Ask the Experts—PDN Filters

In recent years I have been getting many questions about PDN filters from my course participants and from friends, colleagues, and even from strangers. Long gone are the days when the essence of power distribution design recommendation was “place a 0.1 mF bypass capacitor next to each power pin.” Power distribution networks used to primarily contain wires, traces, planes, and parallel bypass capacitors, but very few had systematically designed filters. Just for clarifying the nomenclature, Figure 1 defines what I call a parallel PDN and a PDN filter. For the purposes of this article, the differentiation between a parallel PDN and a PDN filter is the intentionally included series resistive and/or inductive element in the PDN filter.

Novak_Fig1_cap (1).jpg

The figure shows a very simple implementation of a PDN filter. In actual circuits we may have much more complicated circuits. We may have higher order filters with cascaded sections, filter sections connected in branching topologies, and we may also have filters that have to filter in “reverse direction,” preventing the noise from spilling out from the load connected to the output of the filter. Or maybe we need filtering in both ways.

In filter circuits like the ones in Figure 1, the usual question I get is: How do you describe the filter? Should we use transfer impedance (Z21) or scattering transfer parameter (S21)? As I will show, in a lot of applications, none of these two would serve us well, we will need something else: a voltage transfer ratio.

To systematically design a PDN filter, first we must establish the requirements. In PDN design work, the biggest pain for a board designer is that input requirements that would guide the designs are very rare, many times almost non-existent. Establishing PDN requirements is often left to the PDN and board designer. There is one situation, though, when the board designer should be in the position to establish the filter requirements properly: when we need to attenuate the output ripple of a switching regulator for a sensitive pin of a chip that has a specified maximum allowed noise. To quote some simple numbers, the typical peak-to-peak regulator ripple may be around 10 mVpp, which is usually too much for a sensitive analog circuit, such as a reference clock or clock buffer circuit, PLL, SerDes supply, or sensitive analog circuit, more likely requiring around 1 mVpp maximum noise. In such cases, relying on the allowed ripple voltage limit of our sensitive circuit and having an estimate of the regulator’s switching frequency and output ripple, we can determine an attenuation requirement, at least at the switching frequency of the regulator. 

As an illustration, let’s take a filter circuit that is supposed to attenuate 10 times the switching ripple of a DC-DC converter running at 500 kHz for an oscillator circuit that takes just a few milliamperes of current. In addition to the series inductive element and the output capacitor, the circuit in Figure 2 also includes components that model the source side of the filter. R1 and L1 represent the impedance of the DC source, and C2 and C3 with their parasitics model the board capacitors. The L5-R5 circuit is the model for a small inductor. As opposed to a ferrite bead, where we would anticipate a large increase of series resistance and a substantial drop of inductance at high frequencies, this simple inductor model has frequency-independent series resistance and inductance.

The filter output is a single capacitor, modeled by C4-R4-L4. Note that this model intentionally has a very high ESR for C4 that we can get either from a small electrolytic capacitor (though it will likely have a much higher ESL) or we can use a regular ceramic capacitor with low ESR and add a 0.91-ohm series resistor. We also knowingly ignore the printed circuit board details and therefore we limit the AC simulation to below 100 MHz. The filter behavior at higher frequencies will be influenced and probably dominated by component placement, the PCB layout and stackup—something that is beyond the scope of this article.

Novak_Fig2_cap (1).jpg
We simulate the filter circuit in the frequency domain in the 100 Hz to 100 MHz frequency range with a 1V ideal AC source with zero source resistance behind the R1-L1 elements modeling the DC source. Figure 3 shows the simulated voltages at various nodes. The V(src) source voltage shows a flat line at 0 dB, since this is the constant source voltage we enforce. V(in) and V(out) are the input and output voltages of the filter. And finally, V(out)/V(in) is the voltage transfer ratio from input to output. Note that while V(in) and V(out) both have some minor peaking around 20 kHz, the light-blue line of V(out)/V(in) shows no peaking, but it also has just 20 dB/decade slope, whereas the absolute output voltage drops more steeply.

Novak_Fig3-4_cap.jpg
The various impedances can be simulated by attaching a 1A AC current source to the pieces, as shown in Figure 4. The AC simulation uses linearized models and therefore the 1A AC test current that may otherwise damage some of the real components, can be used here with no concern.

In Figure 5 we see that the minor peaking is related to the impedance of the main supply rail that serves as a source and provides input to the filter. The impedance of the series inductor starts out at the 0.1-ohm DC resistance and at about 5 kHz it goes inductive. Due to the large series resistance, the impedance of the output capacitor of the filter becomes resistive at about the same frequency where the source impedance has the peaking.

Novak_Fig5-6_cap.jpg
 

We can also simulate the input and output impedance of the full filter with its actual terminations. As shown in Figure 6, we can simulate the output impedance of the filter with the source-side impedance connected. 

In the reverse direction, the input impedance is simulated with the assumption that the load has very high impedance and therefore we can leave the output of the filter open. On the input side of the filter, we drive the series inductive element without a shunt capacitor included. This is an acceptable approximation for unidirectional filters when the impedance of the source rail is much lower than the input impedance of our filter. When we need to work with multi-stage and/or bi-directional filters, where the driving source impedance is not much lower than the input impedance of our filter, we need to identify and include, both at the input and at the output, the capacitors that belong to our filter circuit.

Novak_Fig7-8.jpg
The input and output impedance curves of the full filter are shown in Figure 7. The input impedance curve compares to the blue line in Figure 5 with the difference that now we have a 2.7 uH inductance in series. This creates an impedance profile as if the capacitor on the output had a 2.7 uH ESL, which effectively removes the flat impedance plateau that the 0.91-ohm ESR created. The output impedance of the filter above 100 kHz matches the 0.91-ohm ESR of the output capacitor. At lower frequencies, the output impedance approaches the 0.1-ohm DC resistance of the inductor.

We can also simulate the network parameters that we may otherwise consider using to describe the filter: Z21 and S21. To do this, we need to modify the simulation circuit by specifying the ports, the termination impedance and add one line that links the input and output: “.net I(Rout) V2.” The SPICE deck is shown in Figure 8, the result is in Figure 9. The three curves in the plot clearly illustrate the difference among them and show us why in our chosen case the voltage transfer function is a better metric.

First, we can notice that the S21 and Z21 curves run in parallel. The vertical difference between them is 25x, which comes from the parallel equivalent of the two 50-ohm terminations we need to calculate S21. We also notice that both curves start at very low values at 100 Hz; this may seem to be good news, but in reality, it is misleading. In this test we assume that the input side of the filter is driven by a high-current low-impedance supply rail. We get a low S21 or Z21 value simply because the low source-side impedance shunts out our test signal. In reality, whatever noise appears across the source rail will be forced across the input of the filter, which represents a much higher impedance and as such it has very little influence on the input noise.

Novak_Fig9-10_cap.jpg
Figure 9: Z21, S21 and voltage transfer ratio.

When we calculate the noise transfer with the source rail’s impedance in place, the finite source impedance associated with S21 and the infinite source impedance associated with the current source for Z21 will produce this large attenuation at low frequencies where the low impedance of the DC source dominates the impedance of the source rail. The other extreme case, when we leave out the source impedance altogether, would produce equally unrealistic results. We show this in Figures 10 and 11.

Novak_Fig11_cap.jpg
S21 starts out at 0 dB at 100 Hz but then it drops unrealistically due to the 50-ohm source impedance, which would be very unexpected from a high-current rail impedance. Z21, on the other hand, starts with a large gain and then it settles at the ESR of C4. Figures 9 and 11 illustrate that both S21 and Z21 hugely depend on the impedance of the source rail, whereas the voltage transfer ratio, by its definition, does not.

We need to remember that details matter; the illustration and conclusions are valid for the stated category of cases when we connect a filter to a main rail, which represents a source-side impedance much lower than the load impedance of the filter output. If you are interested in further details, want to learn about filter measurements and are curious about correlations between measurement and simulation, check out the further reading listed below.

Resources

  1. “Frequency-Domain Characterization of Power Distribution Networks,” Artech House, 2007, Section 5.4.
  2. “Using Ferrites and Inductors in Power Distribution Networks (PDN),” Samtec gEEk spEEk Webinar, December 3, 2020.
  3. Do You Really Need that Ferrite Bead in the PDN?” by Istvan Novak, Design007 Magazine, June 2020.

This column originally appeared in the July 2021 issue of Design007 Magazine.

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2021

Quiet Power: Ask the Experts—PDN Filters

07-12-2021

In recent years I have been getting a lot of questions about PDN filters from my course participants and from friends, colleagues and even from strangers. Long gone are the days when the essence of power distribution design recommendation was “place a 0.1uF bypass capacitor next to each power pin.”

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Quiet Power: Friends and Enemies in Power Distribution

04-16-2021

In signal integrity, for high-speed signaling, high-frequency loss is usually considered a bad side effect that we want to minimize. The DC loss, on the other hand, matters much less, because in many high-speed signaling schemes we intentionally block the DC content of the signal.

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2020

Quiet Power: Be Aware of Default Values in Circuit Simulators

08-27-2020

Simulators are very convenient for getting quick answers without lengthy, expensive, and time-consuming measurements. Istvan Novak explains how, sometimes, you can be surprised if you forget about the numerical limits and the limitations imposed by internal default values.

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Quiet Power: Do You Really Need That Ferrite Bead in the PDN?

07-30-2020

Many times, users have to rely on application notes from chip vendors to figure out how to design the PDN for the active device. Within this still vast area of application notes, Istvan Novak focuses on just one question that greatly divides even the experts: Is it okay, necessary, or harmful to use ferrite beads in the PDN?

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Quiet Power: PCB Fixtures for Power Integrity

02-15-2020

Power-integrity components—such as bypass capacitors, inductors, ferrite beads, or other small discrete components—can be characterized in fixtures. Istvan Novak discusses the wide range of PCB fixtures available for power integrity.

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2019

Quiet Power: How Much Signal Do We Lose Due to Reflections?

11-18-2019

We know that in the signal integrity world, reflections are usually bad. In clock networks, reflection glitches may cause multiple and false clock triggering. In medium-speed digital signaling, reflections will reduce noise margin, and in high-speed serializer/deserializer (SerDes) signaling, reflections increase jitter and create vertical eye closure.

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2018

Quiet Power: Measurement-to-Simulation Correlation on Thin Laminate Test Boards

12-19-2018

A year ago, I introduced causal and frequency-dependent simulation program with integrated circuit emphasis (SPICE) grid models for simulating power-ground plane impedance. The idea behind the solution was to calculate the actual R, L, G, and C parameters for each of the plane segments separately at every frequency point, run a single-point AC simulation, and then stitch the data together to get the frequency-dependent AC response. This month, I will demonstrate how that simple model correlates to measured data and simulation results from other tools.

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2017

Quiet Power: Causal Power Plane Models

12-13-2017

Causal and frequency-dependent models and simulations are important for today’s high-speed signal integrity simulations. But are causal models also necessary for power integrity simulations? When we do signal integrity eye diagram simulations, we define the source signals, so if we use the correct causal models for the passive channel, we will get the correct waveforms and eye reduction due to distortions on the main path and noise contributions from the coupling paths. Istvan Novak explains.

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2016

Dynamic Models for Passive Components

05-11-2016

A year ago, my Quiet Power column described the possible large loss of capacitance in multilayer ceramic capacitors (MLCC) when DC bias voltage is applied. However, DC bias effect is not the only way we can lose capacitance. Temperature, aging, and the magnitude of the AC voltage across the ceramic capacitor also can change its capacitance.

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2015

Avoid Overload in Gain-Phase Measurements

07-01-2015

There is a well-established theory to design stable control loops, but in the case of power converters, we face a significant challenge: each application may require a different set of output capacitors coming with our loads. Since the regulation feedback loop goes through our bypass capacitors, our application-dependent set of capacitors now become part of the control feedback loop. Unfortunately, certain combination of output capacitors may cause the converter to become unstable, something we want to avoid. This raises the need to test, measure, or simulate the control-loop stability. Istvan Novak has more.

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Effects of DC Bias on Ceramic Capacitors

04-01-2015

The density of multilayer ceramic capacitors has increased tremendously over the years. While 15 years ago a state-of-the-art X5R 10V 0402 (EIA) size capacitor might have had a maximum capacitance of 0.1 uF, today the same size capacitor may be available with 10 uF capacitance. This huge increase in density unfortunately comes with a very ugly downside. Istvan Novak has more.

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2014

Vertical Resonances in Ceramic Capacitors

12-03-2014

Because of their small size, we might think that structural resonances inside the ceramic capacitors do not exist in the frequency range where we usually care for the PDN. The unexpected fact is that the better PDN we try to make, the higher the chances that structural resonances inside ceramic capacitors do show up. This column tells you why and how.

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Quiet Power: Vertical Resonances in Ceramic Capacitors

12-03-2014

Because of their small size, we might think that structural resonances inside the ceramic capacitors do not exist in the frequency range where we usually care for the PDN. The unexpected fact is that the better PDN we try to make, the higher the chances that structural resonances inside ceramic capacitors do show up. This column tells you why and how.

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Checking Cable Performance with VNA

04-02-2014

In a previous column, Columnist Istvan Novak showed that poor cable shields can result in significant noise pickup from the air, which can easily mask a few mV of noise voltage needed to measure on a good power distribution rail. In this column, he looks at the same cables in the frequency domain, using a pocket-size vector network analyzer (VNA).

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Quiet Power: Checking Cable Performance with VNA

04-02-2014

In a previous column, Columnist Istvan Novak showed that poor cable shields can result in significant noise pickup from the air, which can easily mask a few mV of noise voltage needed to measure on a good power distribution rail. In this column, he looks at the same cables in the frequency domain, using a pocket-size vector network analyzer (VNA).

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Comparing Cable Shields

01-08-2014

In his last column, Istvan Novak looked at the importance of properly terminating cables even at low frequencies and also showed how much detail can be lost in PDN measurements when bad-quality cables are used. This month, he analyzes a step further the shield in cables.

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2013

Quiet Power: Cable Quality Matters

11-20-2013

In his August column Istvan Novak looked at the importance of properly terminating the cables that connect a measuring instrument to a device under test. He writes that we may be surprised to learn that even if the correct termination is used at the end of the cable, the measured waveform may depend on the quality of the cable used.

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Quiet Power: Don't Forget to Terminate Cables

10-23-2013

In high-speed signal integrity measurements, the first rule is to properly terminate traces and cables. However, many PDN measurements may be limited to lower frequencies, such as measuring the switching ripple of a DC-DC converter. Do you really need to terminate measurement cables if the signal you want to measure is the switching ripple of a converter running at 1 MHz?

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Quiet Power: Do Not Measure PDN Noise Across Capacitors!

08-07-2013

PDN noise can be measured in a variety of ways, but measuring across a capacitor will attenuate the high-frequency burst noise. Keep in mind that by measuring across a capacitor, the converter output ripple reading could be several times higher--or many times smaller--than the actual ripple across our loads.

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Quiet Power: How to Read the ESR Curve

01-15-2013

To use bypass capacitors properly, any designer must understand ESR (effective series resistance). A designer must understand what it means and how to read the ESR curve in measured or simulated plots.

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2012

Quiet Power: What's the Best Method for Probing a PDN?

08-15-2012

Recently, one of Istvan Novak's friends asked him about the preferred method of probing a power distribution network: "Which probe should I use to measure power plane noise?" Although, as usual, the correct answer begins with "It depends," in this case the generic answer is more clear-cut: For many PDN measurements, a simple passive coaxial cable is better.

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Quiet Power: Will Power Planes Disappear?

04-04-2012

Istvan Novak takes a look at an award-winning paper presented at DesignCon 2012, and he discusses the apparent disappearance of power planes from PCBs. In the future, the need for power planes may diminish or go away altogether. The change is already under way, and power planes, full-layer planes in particular, are disappearing fast from printed circuit boards.

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Do Bypass Capacitors Change Plane Resonances?

02-01-2012

My friend Greg recently asked me, "If I add surface-mount capacitors to a bare pair of planes, I am told that the resonant frequency will drop. On the other hand, someone with expertise is telling me that this is not the case. What would you expect to see?" As happens many times, both observations have elements of the truth in them, and a third scenario is not out of the question.

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2011

Be Careful with Transmission Lines in Plane Models

11-16-2011

Last month, we learned how we can determine the grid equivalent circuit parameters for a plane pair. You may wonder: Is it better to use LC lumped components in the SPICE netlist or to make use of SPICE's built-in transmission line models? In short, we can use either of them, but we need to set up our models and expectations correctly.

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Quiet Power: Simulating Planes with SPICE

10-12-2011

There are several excellent commercial tools available for simulating power distribution planes. However, you don't need a commercial tool to do simple plane analysis. You can, for instance, write your SPICE input file and use the free Berkeley SPICE engine to get result. If you want to do your own plane simulations, there are a couple of simple choice.

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Quiet Power: Does Dk Matter for Power Distribution?

08-16-2011

We know that in signal integrity, the relative dielectric constant (Dk) of the laminate is important. Dk sets the delay of traces, the characteristic impedance of interconnects and also scales the static capacitance of structures. Is the same true for power distribution? The answer is yes, but for power distribution all this matters much less.

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2010

Do Not Perforate Planes Unnecessarily

11-03-2010

For this column, I will take a quick detour from the series on the inductance of bypass capacitors. I will devote this column to a few comments about via placement and its potentially detrimental impact on signal and power integrity when antipads heavily perforate planes.

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Inductance of Bypass Capacitors, Part III

08-18-2010

In Part III of a series, we'll take a look at loop or mounted inductance. Loop inductance is important, for instance, when we need a reasonably accurate estimate for the Series Resonance Frequency (SRF), or for the anti-resonance peaking between two different-valued capacitors or between the capacitor's inductance and the static capacitance of the power/ground planes it connects to.

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Quiet Power: Inductance of Bypass Capacitors, Part II

07-21-2010

We finished the last Quiet Power column with a few questions about the inductance of bypass capacitors: Why do different vendors sometimes report different inductance values for nominally the same capacitor? Start by asking the vendors how they obtained these inductance values.

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Why PI Design is More Difficult Than SI

05-19-2010

Why is power integrity design more difficult than signal integrity design? Reasons abound, and unlike SI, we've only begun to study PI. Collective wisdom and experience gained over the coming years will help to alleviate the pain somewhat, but we should expect the challenge to stay with us for some time.

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Why S11 VNA Measurements Don't Work for PDN Measurements

04-14-2010

In this edition of Quiet Power, Istvan Novak continues to examine one-port and two-port vector network analyzer set-ups for PDN measurements, and other tricks and techniques for measuring impedance values below 5 milliohms.

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PDN Measurements: Reducing Cable-Braid Loop Error

02-24-2010

At low and mid frequencies, where the self-impedance of a DUT may reach milliohm values, a fundamental challenge in measurement is the connection to the DUT. Unless we measure a single component in a well-constructed fixture, the homemade connections from the instrument to the DUT will introduce too much error. What's the solution? By Istvan Novak.

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Quiet Power: Calculating Basic Resonances in the PDN

01-27-2010

In my last column, I showed that the piecewise linear Bode plots of various PDN components can create peaking at some interim frequencies. Today, I must cover peaking in more detail, because, even today, certain articles, books and CAD tools provide the wrong answers to this problem.

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