In signal integrity, for high-speed signaling, high-frequency loss is usually considered a bad side effect that we want to minimize. The DC loss, on the other hand, matters much less, because in many high-speed signaling schemes we intentionally block the DC content of the signal.
Another description of the column title could be, “Loss may be your friend, but inductance is your enemy.” This is clearly just an eye-catching generalization; we could always argue that there are cases in signal integrity, too, when minimizing losses could backfire, or at least would have its negative consequences. In power integrity it is almost the opposite: To deliver DC power, we want to minimize the DC losses, but at the same time we don’t want high-frequency noise to travel along the power distribution network. Therefore, AC losses in power distribution are usually helpful.
Inductance is different, though; while it is present in all conductive structures where current flows or can flow, in power integrity, the only situation when we can consider it helpful is when the inductance is in the series path as part of an intentional (or accidental) low-pass filtering where we want to block the noise. In applications where we don’t need or don’t care for blocking power noise from propagating along the PDN structure, increased inductance comes with the downside that we need more capacitance to balance it. In this brief article we show you a few simulation results to illustrate these points.
As a reminder, the simplified block schematic (Figure 1) illustrates the difference between the Parallel PDN, where we do not have intentional series elements in the power distribution network and the PDN filter where the series element is placed (or taken into account) intentionally to create the filtering. This block schematic is highly simplified: three capacitors are shown in the parallel PDN path, but it can be a mix of any number of same-valued and/or different-valued capacitors. Similarly, the PDN filter can be more complex, having an entire parallel PDN on its output, composed of multiple capacitors. The series path can be more complex, too, for instance having series and parallel resistors around the inductive component. Another illustration (Figure 2) shows a simplified schematic of a point-of-load, end-to-end power distribution network, where we explicitly identify series resistances and inductances.
We can assume that in Figure 2 all inductances are side effects: parasitics of the planes, wires, traces, connectors, as well as the parasitics of the capacitors. Note that in LTSPICE, inductors and capacitors can have parasitics assigned to the part and by doing so, instead of calling out separate circuit elements for those parasitics, will speed up the simulation. With several inductances both in the series and parallel paths, together with the capacitances, we end up with a multitude of potential resonances that we all need to worry about. This circuit was simulated and analyzed in a previous column.
To show the consequences of unexpected or accidental series inductance in the power distribution path, we can simplify the PDN circuit to a one-stage interface between the power source and power consumer with an L-C circuit. Figure 3 shows the circuit with its assumed component values. The current sources on the left represent the power consumer (load) and the entire power distribution network is simplified to a one-lump L-C circuit. From the allowed voltage fluctuation and assumed transient current we get a 20-mOhm target impedance. Accordingly, the source resistance is set to 20 mOhms and the L and C in the PDN is selected such that sqrt(L/C) equals the source resistance, just as we would do with a single-lump transmission-line model in signal integrity. It is this matching of these three numbers that guarantees the flat impedance profile and clean transient response.
Why did we choose 1 nH for this illustration? Simply because we may get 1 nH inductance from a single via, though when we assume 10A DC current, it is not a good idea to let it go through a single via. In a real system the 1 nH series inductance may represent the inductance of the entire PCB structure. Figure 4 shows the simulated impedance looking back from the load and the transient response to a load current step. We see from the clean response that it is 2.5 mF capacitance, all what it takes to balance a 1 nH inductance at 20 mOhm impedance.
We can take the case in Figures 3 and 4 as the baseline and see what happens if for any reason the series inductance gets higher. For instance, we can increase the inductance to 10nH and leave everything else (including the parasitics) unchanged. The result is shown in Figure 5. In the frequency response we get a peak at 1 MHz going up to 100 mOhm and correspondingly we get a big 1 MHz ringing in the transient response. In a real system the 10 nH inductance may come from a connector or short wire, or may represent the equivalent output inductance of a very wide-band voltage regulator. To compensate for the increased inductance, our only choice is to increase capacitance proportionally. If we simulate the circuit of Figure 3 with 10 nH inductance and 25 mF capacitance (and leave everything else unchanged), we get back exactly the responses shown (Figure 4).
We can take the re-balanced circuit with 10 nH inductance and 25 mF capacitance as the new baseline and find out what happens if the inductance is increased further, from 10 nH to 1000 nH, or 1 mH. A 1 mH inductance could represent a one-meter-long wire-pair connecting our circuit to a bench supply. Since we changed several items along the way, in Figure 6 we capture the schematics and in Figure 7 we show the result. Note the expanded horizontal scale on the transient response: the 30 kHz peak in the impedance profile creates a huge ringing. If this was a real circuit, the voltage actually would swing negative for a short time.
We already know how to fix this: To balance a 1 mH inductance at 20 mOhm impedance level, we need 2500 uF capacitance. In a real system, when the 1 mH inductance is created by a long wire connection or a low-bandwidth active power source, we in fact need 2500 mF bulk capacitance to suppress the low-frequency peaking. If we do that, the response will again be restored to what we see on Figure 4.
Finally, to illustrate further the usefulness of AC losses in power distribution systems, we show in Figures 8 and 9 what happens if we take the last design and just reduce the “losses,” both the source resistance and the effective series resistance of the capacitor from 20 mOhms to 2 mOhms.
Instead of a 150mV constant drop and a 100mV transient, which can be calculated from the 20 mOhm source resistance and 7.5A and 12.5A current values, now we get a 10-times smaller DC shift and an approximately 150 mVpp ringing. While this may look like some improvement, we need to remember that the worst-case transient noise could be much higher. It happens when the current transients repetitively hit the 3.15 kHz resonance: after the 10th period, the sinusoidal ringing has a 638 mVpp value, which is 4/PI times the 100 mOhm impedance peak multiplied by the 5App transient current. The 4/PI multiplier represents the magnitude of the fundamental spectral component in the Fourier transform of a square-wave.
Inductance is inevitable in electronic circuits. To minimize voltage fluctuations on the power rail, we need to balance inductance with sufficient capacitance. The balancing capacitance we need is linearly proportional to the inductance and varies with the inverse square of the impedance we want to achieve.
- “Be Aware of Default Values in Circuit Simulators,” by Istvan Novak, Design007 Magazine.
This column originally appeared in the April 2021 issue of Design007 Magazine.