# Quiet Power: Friends and Enemies in Power Distribution

In signal integrity, for high-speed signaling, high-frequency loss is usually considered a bad side effect that we want to minimize. The DC loss, on the other hand, matters much less, because in many high-speed signaling schemes we intentionally block the DC content of the signal.

Another description of the column title could be, “Loss may be your friend, but inductance is your enemy.” This is clearly just an eye-catching generalization; we could always argue that there are cases in signal integrity, too, when minimizing losses could backfire, or at least would have its negative consequences. In power integrity it is almost the opposite: To deliver DC power, we want to minimize the DC losses, but at the same time we don’t want high-frequency noise to travel along the power distribution network. Therefore, AC losses in power distribution are usually helpful.

Inductance is different, though; while it is present in all conductive structures where current flows or can flow, in power integrity, the only situation when we can consider it helpful is when the inductance is in the series path as part of an intentional (or accidental) low-pass filtering where we want to block the noise. In applications where we don’t need or don’t care for blocking power noise from propagating along the PDN structure, increased inductance comes with the downside that we need more capacitance to balance it. In this brief article we show you a few simulation results to illustrate these points.

As a reminder, the simplified block schematic (Figure 1) illustrates the difference between the Parallel PDN, where we do not have intentional series elements in the power distribution network and the PDN filter where the series element is placed (or taken into account) intentionally to create the filtering. This block schematic is highly simplified: three capacitors are shown in the parallel PDN path, but it can be a mix of any number of same-valued and/or different-valued capacitors. Similarly, the PDN filter can be more complex, having an entire parallel PDN on its output, composed of multiple capacitors. The series path can be more complex, too, for instance having series and parallel resistors around the inductive component. Another illustration (Figure 2) shows a simplified schematic of a point-of-load, end-to-end power distribution network, where we explicitly identify series resistances and inductances.

We can assume that in Figure 2 all inductances are side effects: parasitics of the planes, wires, traces, connectors, as well as the parasitics of the capacitors. Note that in LTSPICE, inductors and capacitors can have parasitics assigned to the part and by doing so, instead of calling out separate circuit elements for those parasitics, will speed up the simulation. With several inductances both in the series and parallel paths, together with the capacitances, we end up with a multitude of potential resonances that we all need to worry about. This circuit was simulated and analyzed in a previous column[1].

To show the consequences of unexpected or accidental series inductance in the power distribution path, we can simplify the PDN circuit to a one-stage interface between the power source and power consumer with an L-C circuit. Figure 3 shows the circuit with its assumed component values. The current sources on the left represent the power consumer (load) and the entire power distribution network is simplified to a one-lump L-C circuit. From the allowed voltage fluctuation and assumed transient current we get a 20-mOhm target impedance. Accordingly, the source resistance is set to 20 mOhms and the L and C in the PDN is selected such that sqrt(L/C) equals the source resistance, just as we would do with a single-lump transmission-line model in signal integrity. It is this matching of these three numbers that guarantees the flat impedance profile and clean transient response.

Why did we choose 1 nH for this illustration? Simply because we may get 1 nH inductance from a single via, though when we assume 10A DC current, it is not a good idea to let it go through a single via. In a real system the 1 nH series inductance may represent the inductance of the entire PCB structure. Figure 4 shows the simulated impedance looking back from the load and the transient response to a load current step. We see from the clean response that it is 2.5 mF capacitance, all what it takes to balance a 1 nH inductance at 20 mOhm impedance.

We can take the case in Figures 3 and 4 as the baseline and see what happens if for any reason the series inductance gets higher. For instance, we can increase the inductance to 10nH and leave everything else (including the parasitics) unchanged. The result is shown in Figure 5. In the frequency response we get a peak at 1 MHz going up to 100 mOhm and correspondingly we get a big 1 MHz ringing in the transient response. In a real system the 10 nH inductance may come from a connector or short wire, or may represent the equivalent output inductance of a very wide-band voltage regulator. To compensate for the increased inductance, our only choice is to increase capacitance proportionally. If we simulate the circuit of Figure 3 with 10 nH inductance and 25 mF capacitance (and leave everything else unchanged), we get back exactly the responses shown (Figure 4).

We can take the re-balanced circuit with 10 nH inductance and 25 mF capacitance as the new baseline and find out what happens if the inductance is increased further, from 10 nH to 1000 nH, or 1 mH. A 1 mH inductance could represent a one-meter-long wire-pair connecting our circuit to a bench supply. Since we changed several items along the way, in Figure 6 we capture the schematics and in Figure 7 we show the result. Note the expanded horizontal scale on the transient response: the 30 kHz peak in the impedance profile creates a huge ringing. If this was a real circuit, the voltage actually would swing negative for a short time.

We already know how to fix this: To balance a 1 mH inductance at 20 mOhm impedance level, we need 2500 uF capacitance. In a real system, when the 1 mH inductance is created by a long wire connection or a low-bandwidth active power source, we in fact need 2500 mF bulk capacitance to suppress the low-frequency peaking. If we do that, the response will again be restored to what we see on Figure 4.

Finally, to illustrate further the usefulness of AC losses in power distribution systems, we show in Figures 8 and 9 what happens if we take the last design and just reduce the “losses,” both the source resistance and the effective series resistance of the capacitor from 20 mOhms to 2 mOhms.

Instead of a 150mV constant drop and a 100mV transient, which can be calculated from the 20 mOhm source resistance and 7.5A and 12.5A current values, now we get a 10-times smaller DC shift and an approximately 150 mVpp ringing. While this may look like some improvement, we need to remember that the worst-case transient noise could be much higher. It happens when the current transients repetitively hit the 3.15 kHz resonance: after the 10th period, the sinusoidal ringing has a 638 mVpp value, which is 4/PI times the 100 mOhm impedance peak multiplied by the 5App transient current. The 4/PI multiplier represents the magnitude of the fundamental spectral component in the Fourier transform of a square-wave.

Summary
Inductance is inevitable in electronic circuits. To minimize voltage fluctuations on the power rail, we need to balance inductance with sufficient capacitance. The balancing capacitance we need is linearly proportional to the inductance and varies with the inverse square of the impedance we want to achieve.

References

1. “Be Aware of Default Values in Circuit Simulators,” by Istvan Novak, Design007 Magazine.

This column originally appeared in the April 2021 issue of Design007 Magazine.

# Quiet Power: Friends and Enemies in Power Distribution

04-16-2021

In signal integrity, for high-speed signaling, high-frequency loss is usually considered a bad side effect that we want to minimize. The DC loss, on the other hand, matters much less, because in many high-speed signaling schemes we intentionally block the DC content of the signal.

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# Quiet Power: Be Aware of Default Values in Circuit Simulators

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# Quiet Power: Do You Really Need That Ferrite Bead in the PDN?

07-30-2020

Many times, users have to rely on application notes from chip vendors to figure out how to design the PDN for the active device. Within this still vast area of application notes, Istvan Novak focuses on just one question that greatly divides even the experts: Is it okay, necessary, or harmful to use ferrite beads in the PDN?

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# Quiet Power: PCB Fixtures for Power Integrity

02-15-2020

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# Quiet Power: How Much Signal Do We Lose Due to Reflections?

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We know that in the signal integrity world, reflections are usually bad. In clock networks, reflection glitches may cause multiple and false clock triggering. In medium-speed digital signaling, reflections will reduce noise margin, and in high-speed serializer/deserializer (SerDes) signaling, reflections increase jitter and create vertical eye closure.

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# Quiet Power: Measurement-to-Simulation Correlation on Thin Laminate Test Boards

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A year ago, I introduced causal and frequency-dependent simulation program with integrated circuit emphasis (SPICE) grid models for simulating power-ground plane impedance. The idea behind the solution was to calculate the actual R, L, G, and C parameters for each of the plane segments separately at every frequency point, run a single-point AC simulation, and then stitch the data together to get the frequency-dependent AC response. This month, I will demonstrate how that simple model correlates to measured data and simulation results from other tools.

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# Quiet Power: Causal Power Plane Models

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Causal and frequency-dependent models and simulations are important for today’s high-speed signal integrity simulations. But are causal models also necessary for power integrity simulations? When we do signal integrity eye diagram simulations, we define the source signals, so if we use the correct causal models for the passive channel, we will get the correct waveforms and eye reduction due to distortions on the main path and noise contributions from the coupling paths. Istvan Novak explains.

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# Dynamic Models for Passive Components

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A year ago, my Quiet Power column described the possible large loss of capacitance in multilayer ceramic capacitors (MLCC) when DC bias voltage is applied. However, DC bias effect is not the only way we can lose capacitance. Temperature, aging, and the magnitude of the AC voltage across the ceramic capacitor also can change its capacitance.

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# Avoid Overload in Gain-Phase Measurements

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There is a well-established theory to design stable control loops, but in the case of power converters, we face a significant challenge: each application may require a different set of output capacitors coming with our loads. Since the regulation feedback loop goes through our bypass capacitors, our application-dependent set of capacitors now become part of the control feedback loop. Unfortunately, certain combination of output capacitors may cause the converter to become unstable, something we want to avoid. This raises the need to test, measure, or simulate the control-loop stability. Istvan Novak has more.

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# Effects of DC Bias on Ceramic Capacitors

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The density of multilayer ceramic capacitors has increased tremendously over the years. While 15 years ago a state-of-the-art X5R 10V 0402 (EIA) size capacitor might have had a maximum capacitance of 0.1 uF, today the same size capacitor may be available with 10 uF capacitance. This huge increase in density unfortunately comes with a very ugly downside. Istvan Novak has more.

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# Vertical Resonances in Ceramic Capacitors

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Because of their small size, we might think that structural resonances inside the ceramic capacitors do not exist in the frequency range where we usually care for the PDN. The unexpected fact is that the better PDN we try to make, the higher the chances that structural resonances inside ceramic capacitors do show up. This column tells you why and how.

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# Quiet Power: Vertical Resonances in Ceramic Capacitors

12-03-2014

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# Checking Cable Performance with VNA

04-02-2014

In a previous column, Columnist Istvan Novak showed that poor cable shields can result in significant noise pickup from the air, which can easily mask a few mV of noise voltage needed to measure on a good power distribution rail. In this column, he looks at the same cables in the frequency domain, using a pocket-size vector network analyzer (VNA).

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# Quiet Power: Checking Cable Performance with VNA

04-02-2014

In a previous column, Columnist Istvan Novak showed that poor cable shields can result in significant noise pickup from the air, which can easily mask a few mV of noise voltage needed to measure on a good power distribution rail. In this column, he looks at the same cables in the frequency domain, using a pocket-size vector network analyzer (VNA).

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# Comparing Cable Shields

01-08-2014

In his last column, Istvan Novak looked at the importance of properly terminating cables even at low frequencies and also showed how much detail can be lost in PDN measurements when bad-quality cables are used. This month, he analyzes a step further the shield in cables.

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# Quiet Power: Cable Quality Matters

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In his August column Istvan Novak looked at the importance of properly terminating the cables that connect a measuring instrument to a device under test. He writes that we may be surprised to learn that even if the correct termination is used at the end of the cable, the measured waveform may depend on the quality of the cable used.

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# Quiet Power: Don't Forget to Terminate Cables

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In high-speed signal integrity measurements, the first rule is to properly terminate traces and cables. However, many PDN measurements may be limited to lower frequencies, such as measuring the switching ripple of a DC-DC converter. Do you really need to terminate measurement cables if the signal you want to measure is the switching ripple of a converter running at 1 MHz?

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# Quiet Power: Do Not Measure PDN Noise Across Capacitors!

08-07-2013

PDN noise can be measured in a variety of ways, but measuring across a capacitor will attenuate the high-frequency burst noise. Keep in mind that by measuring across a capacitor, the converter output ripple reading could be several times higher--or many times smaller--than the actual ripple across our loads.

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# Quiet Power: How to Read the ESR Curve

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# Quiet Power: What's the Best Method for Probing a PDN?

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Recently, one of Istvan Novak's friends asked him about the preferred method of probing a power distribution network: "Which probe should I use to measure power plane noise?" Although, as usual, the correct answer begins with "It depends," in this case the generic answer is more clear-cut: For many PDN measurements, a simple passive coaxial cable is better.

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# Quiet Power: Will Power Planes Disappear?

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Istvan Novak takes a look at an award-winning paper presented at DesignCon 2012, and he discusses the apparent disappearance of power planes from PCBs. In the future, the need for power planes may diminish or go away altogether. The change is already under way, and power planes, full-layer planes in particular, are disappearing fast from printed circuit boards.

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My friend Greg recently asked me, "If I add surface-mount capacitors to a bare pair of planes, I am told that the resonant frequency will drop. On the other hand, someone with expertise is telling me that this is not the case. What would you expect to see?" As happens many times, both observations have elements of the truth in them, and a third scenario is not out of the question.

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# Be Careful with Transmission Lines in Plane Models

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Last month, we learned how we can determine the grid equivalent circuit parameters for a plane pair. You may wonder: Is it better to use LC lumped components in the SPICE netlist or to make use of SPICE's built-in transmission line models? In short, we can use either of them, but we need to set up our models and expectations correctly.

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# Quiet Power: Simulating Planes with SPICE

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There are several excellent commercial tools available for simulating power distribution planes. However, you don't need a commercial tool to do simple plane analysis. You can, for instance, write your SPICE input file and use the free Berkeley SPICE engine to get result. If you want to do your own plane simulations, there are a couple of simple choice.

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# Quiet Power: Does Dk Matter for Power Distribution?

08-16-2011

We know that in signal integrity, the relative dielectric constant (Dk) of the laminate is important. Dk sets the delay of traces, the characteristic impedance of interconnects and also scales the static capacitance of structures. Is the same true for power distribution? The answer is yes, but for power distribution all this matters much less.

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# Do Not Perforate Planes Unnecessarily

11-03-2010

For this column, I will take a quick detour from the series on the inductance of bypass capacitors. I will devote this column to a few comments about via placement and its potentially detrimental impact on signal and power integrity when antipads heavily perforate planes.

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# Inductance of Bypass Capacitors, Part III

08-18-2010

In Part III of a series, we'll take a look at loop or mounted inductance. Loop inductance is important, for instance, when we need a reasonably accurate estimate for the Series Resonance Frequency (SRF), or for the anti-resonance peaking between two different-valued capacitors or between the capacitor's inductance and the static capacitance of the power/ground planes it connects to.

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# Quiet Power: Inductance of Bypass Capacitors, Part II

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We finished the last Quiet Power column with a few questions about the inductance of bypass capacitors: Why do different vendors sometimes report different inductance values for nominally the same capacitor? Start by asking the vendors how they obtained these inductance values.

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# Why PI Design is More Difficult Than SI

05-19-2010

Why is power integrity design more difficult than signal integrity design? Reasons abound, and unlike SI, we've only begun to study PI. Collective wisdom and experience gained over the coming years will help to alleviate the pain somewhat, but we should expect the challenge to stay with us for some time.

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# Why S11 VNA Measurements Don't Work for PDN Measurements

04-14-2010

In this edition of Quiet Power, Istvan Novak continues to examine one-port and two-port vector network analyzer set-ups for PDN measurements, and other tricks and techniques for measuring impedance values below 5 milliohms.

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# PDN Measurements: Reducing Cable-Braid Loop Error

02-24-2010

At low and mid frequencies, where the self-impedance of a DUT may reach milliohm values, a fundamental challenge in measurement is the connection to the DUT. Unless we measure a single component in a well-constructed fixture, the homemade connections from the instrument to the DUT will introduce too much error. What's the solution? By Istvan Novak.

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# Quiet Power: Calculating Basic Resonances in the PDN

01-27-2010

In my last column, I showed that the piecewise linear Bode plots of various PDN components can create peaking at some interim frequencies. Today, I must cover peaking in more detail, because, even today, certain articles, books and CAD tools provide the wrong answers to this problem.

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