Keysight PathWave Software Selected by Menlo Micro


Reading time ( words)

Keysight Technologies, Inc., a leading technology company that delivers advanced design and validation solutions to help accelerate innovation to connect and secure the world, announced that Menlo Micro has selected the company’s PathWave Advanced Design System (ADS) and Electromagnetic (EM) Design software to innovate advances in material science and develop high-performance microelectromechanical system (MEMS) switches.

Menlo Micro needed to resolve customer challenges relating to accurate 3D electromagnetic simulation and integrated design, test and measurement workflows in the development of its new MM5130, an ultra-low-loss radio-frequency (RF) SP4T switch, to address high-power switching applications up to 26 GHz. With an eye on time to market, Menlo targeted a short design cycle of three to four months.

Menlo Micro wanted to validate performance of its new MM5130 switch early in the development process, so it chose to implement its own PCB de-embedding algorithms into Keysight’s PathWave ADS software. “In choosing design tools, we needed to consider the whole flow, from the schematic to the 3D simulations,” said Dr. Xu Zhu, Menlo Micro’s director of technology. “Our engineers need to be familiar with the tools, and that is one of the reasons why we chose Keysight’s PathWave Advanced Design System as the core tool.”

Menlo chose Keysight’s EM Design software, including EMPro and RFPro, integrated into the PathWave ADS platform, to create a familiar design environment for their engineering team. Because the engineers were constantly changing and adjusting the layout in PathWave ADS, a smooth workflow from circuit layout to 3D EM simulation was critical. 

Keysight’s EMPro and RFPro enabled Menlo to make smooth translations from the 2D layout to the 3D model files. Keysight’s RFPro, with the SmartMount and Mesh Domain Optimization technologies, solved the mesh optimization challenges. Menlo Micro’s design flow includes tools from multiple vendors, so interoperability was critical. 

As a result, Menlo Micro was able to shorten the design cycle of its new MEMS switch by 65 percent with measurements correlating closely to simulation. Previous projects of this scale could take up to nine months. When comparing key banner specifications against other alternatives, Menlo Micro verified its innovative technology offered significant improvements in power density (SP4T 25 W power handling), RF insertion loss, linearity and ultra-low power consumption. 

"Menlo Micro designed a complex, multi-technology module comprised of a wide range of geometries from micron-scale MEMs to millimeter-scale PCBs,” stated Tom Lillig, general manager of Keysight’s PathWave Design business. “Leveraging Keysight’s fast, high capacity, 3D EM circuit simulators they achieved a successful implementation in one pass.” 

Menlo also created device prototypes and conducted measurements by wafer probing, which demonstrated first-pass manufacturing success. Next, their engineering team performed measurements on Keysight’s vector network analyzer (VNA) to compare its simulation results against actual de-embedded device measurements as a proof of concept for customers.

Share

Print


Suggested Items

‘The Trouble with Tribbles’

06/17/2021 | Dana Korf, Korf Consultancy
The original Star Trek series came into my life in 1966 as I was entering sixth grade. I was fascinated by the technology being used, such as communicators and phasers, and the crazy assortment of humans and aliens in each episode. My favorite episode is “The Trouble with Tribbles,” an episode combining cute Tribbles, science, and good/bad guys—sprinkled with sarcastic humor.

IPC-2581 Revision C: Complete Build Intent for Rigid-Flex

04/30/2021 | Ed Acheson, Cadence Design Systems
With the current design transfer formats, rigid-flex designers face a hand-off conundrum. You know the situation: My rigid-flex design is done so now it is time to get this built and into the product. Reviewing the documentation reveals that there are tables to define the different stackup definitions used in the design. The cross-references for the different zones to areas of the design are all there, I think. The last time a zone definition was missed, we caused a costly mistake.

Why We Simulate

04/29/2021 | Bill Hargin, Z-zero
When Bill Hargin was cutting his teeth in high-speed PCB design some 25 years ago, speeds were slow, layer counts were low, dielectric constants and loss tangents were high, design margins were wide, copper roughness didn’t matter, and glass-weave styles didn’t matter. Dielectrics were called “FR-4” and their properties didn’t matter much. A fast PCI bus operated at just 66 MHz. Times have certainly changed.



Copyright © 2021 I-Connect007. All rights reserved.