Freedom CAD Book Excerpt: The Printed Circuit Designer’s Guide to… Executing Complex PCBs

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The following is an excerpt from Chapter 5 of The Printed Circuit Designer’s Guide to… Executing Complex PCBs written by Scott Miller of Freedom CAD Services.

Chapter 5: Design Rules, Simulations, and Analyses

Timing is everything in life and complex PCBs.--Anonymous 

It is a fact that complex electronic components will not function properly unless a specific set of physical conditions is met. Active components and chipset performance requirements are presently being pushed to the edge. Their capabilities are only limited by the physical geometry and electromechanical properties of the materials that interface with them. We have come to the point where component chip makers are supplying 100-page user manuals describing not only what a chip can do, but also the layout, assembly manufacturing, and environmental operating criteria required for it to perform. Careful attention to these rules must be considered for the successful operation of the individual component within a circuit and the performance of the circuit in relation to all circuits on the PCB.

One designer said:

“Signal and power integrity analysis is a key way to ensure that the board design will meet the performance requirements on the first pass. By using software to simulate the effects on signal and power integrity, our customers spend less time in the lab trying to find out why their design isn’t performing as expected. Performing in-process simulations enable problems to be identified and corrections to be made earlier in the design process, thus minimizing the collateral damage. The more items you have to move to address a problem, the more time this takes.”

Starting the Physical Design Process

As previously noted in Figure 1.2, the next step is entering the execution phase of the board design process, which involves executing all of the elaborate pre-planning that has already taken place.

Layout Processes

Many companies employ a number of specialized layout processes. One senior project engineer explained his process for very complex boards that he has refined over many years:

“I work with larger OEMs, and this is what I tell them. I go through their design and create libraries of templates to give us predictability and efficiency. What I do is predictive engineering, which is to reuse circuits that they've already used. If they are a repeat customer, they already know it works, and now suddenly it saves them in fabrication, assembly, tests, and debug. They save a boatload of money and end up with fewer spins.

Our process is to create reusable modules. This allows us to use parts that you've already used, and if it's a new part, we go ahead and do a module for it; just substitute the old one for the new one after we've modified it. So, from that point on, after it has been proved to work, it works for us.

First, we have them define stackups ahead of time. We sit down with the customer and their fabrication shop and determine whatever layer count they feel with this particular company works best. We build in all of the fabrication capabilities that their fabrication house has because they usually have more than one fabrication house. We're just trying to define everything ahead of time so that it now becomes predictable.

Then, you place and replicate as much as you can. That's really what it comes down to. When the placement is done, you do placement verification. Then, once that's all done, approved, and cleaned up, you route all of the differential pairs and high-speed clocks. Next, you send that to engineering for them to review and route the remaining signals, which are pretty much single-ended nets, matched groups, etc. That last step is final verification. When we get to that, we send them a final board to review. We can do it in two weeks when we have all these pieces in place because it's already designed.

At least I know that the replication process or reuse process is very good. It works, and people that have experienced it like it. And now the tools are better.”

His process is as follows, using clusters, templates, and bundles:

  • Auto-cluster from schematics
  • Auto-place for complex parts
  • Place
  • Replicate and/or reuse templates
  • Placement verify (refine)
  • Fabrication and assembly review
  • Cluster nets into bundles and route
  • Complete routing with constraints
  • Engineering review for SI, PI, and power distribution network (PDN)
  • Rest of routing
  • Validation (DFM and DFT)
  • Create a template for future use
  • Customer review
  • Deliverables

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