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Words of Advice: Making Life Easier for Fabrication and Assembly
10/17/2019 | Andy Shaughnessy, Design007 Magazine
Words of Advice: Starting a New Design
10/14/2019 | Andy Shaughnessy, Design007 Magazine
ODB++: Transforming Ideas Into Products
10/09/2019 | Max Clark, Mentor, a Siemens Business
Bob Martin Brings Maker Attitude to AltiumLive Keynote
10/07/2019 | Andy Shaughnessy, Design007 Magazine
Words of Advice: What Data Format do you Send Your Assembly Provider?
10/03/2019 | I-Connect007 Research Team
IPC's Greg Munie Discusses DFX and Quest for New Blood
IPC Director of Design Programs Greg Munie joins Editor Andy Shaughnessy to discuss a new DFX guideline his association is working on to carry everyone in the product realization process--from the initial design to getting a finished product out the door. IPC is also working to insure that the great design knowledge possessed by current industry veterans is passed on to the next generation.
Zuken Driving Chip-package Co-design
Humair Mandavia, executive director, SOZO Center, and Steve Watt, senior application engineer, both of Zuken, join Editor Andy Shaughnessy to discuss chip-package co-design, a challenge many users face. Zuken is aiming to bridge the gap between the two technologies and leverage its tools to allow easier sharing of information and design a system in a cohesive environment.
Mitigating the High Cost of PCB Documentation
The goal of minimizing the time and cost for engineering a new product and getting it to market before the competition is a constant struggle for developers of leading-edge electronic products. Eliminating bottlenecks can dramatically reduce concept-to-production time in a product life cycle--the Holy Grail in the quest for corporate efficiency.
Hartley on the Future of PCB Design Education
Rick Hartley, senior principal engineer at L-3 Avionics, joins Editor Andy Shaughnessy to discuss the state of PCB design in general and the highlights of Designers Forum 2014, including a presentation on IPC-2581 standard for transferring design data.
Properly Designing PCB Footprints
Today the geometries of board-level circuits are being driven to optimize space, cost, and performance, resulting in a large selection of fine-pitch components, connectors, and integrated circuits. Overcoming the challenges and the complexities of the circuit is challenging enough without considering the obstacles of mass producing the end-product with extremely high yield expectations.
The Shaughnessy Report: Back to Vegas
After three years, it'll be nice to get back to Vegas. It's a microcosm of America, a symbol of all that is positive and negative in the land of red, white, and blue. This town is a true dichotomy: gamblers can win big, or lose big. There are a lot of really happy people on the way up, and a lot of not-so-happy people on the way down.
Altium's Ben Jordan on Version Control
Ben Jordan, customer success manager for Altium, joins Editor Andy Shaughnessy at Designers Forum 2014 to discuss version control, software that keeps track of all revisions and makes it easy to build solid design habits with schematic pages, PCB documents, and outputs for fabrication and assembly.
Testing Your AMI Models
Todd Westerhoff, vice president of semiconductor relations for SiSoft, explains to Editor Andy Shaughnessy the challenges of testing AMI models and his idea that we're still learning from Mother Nature.
Trials, Tribulations, and Decisions at 100 Gb
Richard Mellitz, principal engineer at Intel, discusses his DesignCon presentation on developing specifications for 100 Gb Ethernet cable and backplanes with Editor Andy Shaughnessy.
PCB and Packaging Design up to 50 GHz: Identifying Dielectric and Conductor Roughness Models
Dielectric and conductor roughness models are necessary for PCB and packaging interconnect analysis up to 50 GHz and beyond. This article from Simberian's Yuriy Shlepnev, provides an overview of a variety of methods for identifying these models.
An Introduction to Rigid-flex Design Best Practices
Once considered too costly by many designers, rigid-flex circuits are becoming more prevalent every day. Now designers are learning how to deal with this seemingly schizophrenic product format.
Design of Experiments: What's That?
What happens when the task of simulating thousands of jobs has grown so tedious that determining solutions one by one would take years? How about sampling a few hundred cases and creating models that will simulate millions of cases in seconds! SiSoft is forging out successful DoE responsiveness modeling and has published a white paper to prove it.
On Board With Onshoring
Sulaiman Roy, vice president of Imagineering, explains to Editor Andy Shaughnessy his company's onshoring strategy, as he predicts 20 to 25% of offshore business will return to the U.S. Roy also describes the company's expanding focus on HDI boards.
EMA Simplifies DDR3 Simulation Data
Chris Banton, marketing manager with EMA Design Automation, discusses his company's efforts to integrate Sigrity's DDR technology into EMA's TimingDesigner. The result helps designers to better deal with the "gobs and gobs" of data generated by DDR3 simulation.
Influence of Via Stub Length and Antipad Size on the Insertion Loss Profile
What effect do via stub length and antipad size have on resonant frequency and insertion loss profile? This article, from Multek's Alexander Ippich, focuses on an investigation into these issues and offers recommendations for optimum via stub length.
What's Stopping the Signals?
What exactly is getting in the way of our signals, and what can we do about it? Lee Ritchey, president of Speeding Edge, and Guest Editor Glenn Oliver explore the technological roadblocks that are keeping our signals out.
Free Impedance Calculators May Not Cut It
Polar Instruments President Ken Taylor suggests that using a simple, free impedance calculator to design a stackup for today's fine-line technology is not a wise or accurate practice. He explains to Guest Editor Kelly Dack why designers get what they pay for--or don't.
Archambault Retired, But Still in EMC
Bruce Archambeault may have retired (more or less), but the IBM emeritus tells Editor Andy Shaughnessy he's still working with the IEEE EMC Society, which meets for a symposium this August in Raleigh, North Carolina and in Silicon Valley in 2015.
Flex Design: Should You Do It Yourself?
The urge to do it yourself is strong, whether fixing a faucet, cutting your child's hair, or designing a flex circuit. After all, how hard can it be? Here are four situations that might necessitate the skills of a dedicated flex designer according to Tom Woznicki.
Thermal Design: Still a Process Pinch Point?
Traditional methods of using correlations and simple design rules to perform thermal design are becoming more difficult to apply. But new CFD technology is now bringing thermal design to the generalist PCB designer and design engineers.
Painting Pads: The Scourge of CAD-to-CAM Communication
Often called the "backbone of the electronics industry," the Gerber format is the easiest and most reliable image data transfer format available to PCB designers and engineers. Unfortunately, this format is often used incorrectly, including one practice that PCB designers should cease immediately: painting pads and areas.
It Takes a Team to Assure Power Integrity
The proverb "It takes a village to raise a child" also applies to PCB power integrity, says author Brad Brim. Multiple design team members will contribute to assuring circuit board physical implementation as a design progresses from infancy of concept to a mature product.
Process Preparation for World-class Competition
Process preparation systems should be able to cope with all aspects and requirements of production--all machines, all processes--without mistakes and without confusion. Only in this way can one scale the flexibility and responsiveness of the production operation in line with customer and market expectations.
Improve Your Design Cycle Through Manufacturing Flow
One of the most important steps when getting a product from the design stage to manufacturing is new product introduction (NPI). In this paper, Mark Laing discusses a more efficient flow to the NPI phase, identifying ways to streamline the NPI flow to improve both time to market and cost savings, especially concentrating on the process preparation tool.
Design for Assembly: Components, Part 2
Every PCB layout must go through the component assembly process, and a PCB designer can do several things to make the assembly process easier. Author Tom Hausherr provides details in his second offering of this series.
Quiet Power: Comparing Cable Shields
In his last column, Istvan Novak looked at the importance of properly terminating cables even at low frequencies and also showed how much detail can be lost in PDN measurements when bad-quality cables are used. This month, he analyzes a step further the shield in cables.
Top 10 Most-read PCB Design Magazine Articles of 2013
When our contributors speak, people listen! We've compiled a list of 10 of the most-read PCB Design Magazine articles in 2013. Take another look and enjoy these gems one more time.
Qualifying a PCB Facility: Survey or Audit?
There are surveys, and then there are audits. For the PCB designers of today, working with an audited company will minimize bad results and provide a greater level of trust. If you're an OEM, you can also market the fact that your boards are fabricated by an independently audited facility.
Design for Assembly: Components
A PCB designer needs to design every layout to meet one of the IPC product classes so the manufacturer knows the category classification of the end electronic product being designed. Every PCB layout must go through the component assembly process, and a designer can do several things to make the process easier.
FAQ: Qualifying Fabricators with Kelly Dack
Kelly Dack, a senior PCB designer for a gaming technology company, is always on the lookout for good fabricators, occasionally conducting site visits to gauge a manufacturer’s qualifications and capabilities. We asked Kelly to give us a rundown on his process for qualifying fabricators and the criteria he uses.
Designed for Manufacture?
Good DFM practices can save a lot of time and questions in CAM engineering, while ensuring your boards are easier to make. Here are a few words of advice and techniques from Neil Day that can help with your next design.
The Shaughnessy Report: PCB West a Good Omen for 2014
"The exhibition opened on Wednesday, and attendees jammed the aisles for much of the day. I didn't see any real dead times, though traffic did slow down after lunch. At 5:00 p.m., EMA Design Automation turned on the margarita machine, Altium got the beer and wine flowing, and the place was packed again," writes Shaughnessy.
Improving Quality During Assembly with DFX
The number of DFM issues reported on a PCBA is inversely proportional to the components' pitch values. The authors discuss the problems facing designers who use cutting-edge BGAs, and the Flextronics DFX process that detected them before mass production.
Design for Manufacture: A Tale of Two Materials
The development of the optical waveguides and integrated photonics is driven largely by the capacity demands (as well as the power consumption) of high-performance routers and network switches, whose backplanes may span more than 20 inches. Columnist Amit Bahl explains.
IPC-2581B Advances Data Transfer Standard
The recent release of IPC-2581B, Generic Requirements for Printed Board Assembly Products Manufacturing Description Data and Transfer Methodology goes a long way toward automating file transfers, but the ever-changing needs of the electronics industry means there will be many more meetings to keep standards up to date.
Key Factors Influencing Laminate Material Selection for Today's PCBs
Recently, a flurry of new and promising laminate materials have entered the market, coming from the four corners of the world. Sanmina's Steve Iketani and Brian Nelson offer their take on materials, from FR-4 to low-Df/Dk laminates, and much more.
Mentor Graphics Offers End-to-end Solutions
Stephan Hafele, director of worldwide sales, explains how Mentor Graphics has recognized and responded to the changing face of electronics manufacturing by offering a totally integrated end-to-end solution to supply chain management and control, from design through assembly.
Differential Signal Design, Part 2
Lee Ritchey concludes his two-part series on differential signal design and design rules and he addresses the many misconceptions surrounding differential pair design.
Board Design Moves Beyond Reach of In-Circuit Testers
Although intrusive test technologies on the manufacturing floor such as ICT have been effective in the past, recent advancements in basic electronic technologies are disrupting legacy test methods. Now, non-intrusive board testing is replacing the intrusive types, such as in-circuit testing.
Improved Thin-Film Resistor Material
Improvements in resistive alloys now allow for the creation of very small resistor elements that can be built within a logic trace. This results in improved electrical performance, improved reliability, more routing area and greater flexibility for PCB designers. Ohmega's Bruce Mahler reports.
EPTAC Expands Into Design Certification
Leo Lambert, vice president of EPTAC Corporation, says his company is on the move. After years of providing manufacturing training, EPTAC now offers IPC Certified Interconnect Designer training, with design instructor Gary Ferrari heading up the design effort. The company has also expanded into a variety of new locations, including Canada.
The Bare (Board) Truth: A PCB Design Potpourri
In this column, Mark Thompson revisits topics covered in some of his previous columns and fleshes them out with new, updated information. Thompson says, "In this job, I truly learn something every day, and I'm happy to share a few notable nuggets with you."
Differential Signal Design, Part 1
In its most basic form, a differential pair is made up of two transmission lines that have equal and opposite polarity signals traveling on them. But engineers and PCB designers have been flooded with misinformation about differential signal design. Lee Ritchey breaks down diff pair design and design rules in this two-part series.
Increase Productivity and Increase Profit: A Fresh Perspective
Increasing productivity will result in increasing profit all the way from engineering and PCB layout through fabrication and assembly. Increasing productivity can also make you more competitive, as well as help you earn a pay raise or a higher position in the company.
Designing for Profitability
What can designers do to increase the profitability of their designs? No list of do's and don'ts will work in every case, because each situation is just different enough that the list won't fit correctly and will need to be modified. But Steve Hageman shares some tips on virtual prototyping and other techniques that have made a real difference in his design process.
Dynamic Supply Chain Visibility Cuts Re-spins
Real-time supply chain information reduces risks, cuts design iterations, and accelerates time-to-market. When real-time supply chain data are visible to the design team, designers can reduce or eliminate expensive downstream design changes and re-spins.
Connecting the Dots: The CAD Library
Before looking at libraries, Columnist Jack Olson says it will be helpful to have a basic understanding of how circuit boards are fabricated. Offering a simple, 10-step guide to PCB fabrication, Olson then uses the example provided as a desired design goal.
Next-Generation High-Speed Materials: An Updated List
The evolution of high-speed PCB materials moves just as quickly as the circuit that passes through them. It is no surprise that sometimes a very busy product developer might be confused by, or simply be unaware of, the newest advancements in cutting-edge substrates.
Reid on Reliability: Cohesive Failures
When material damage occurs, it usually extends thermal cycles to failure, frequently giving false positive artifact results. Adhesive delamination and cohesive failures, however, can reduce the thermal cycles to failure. The crack may propagate starting in the epoxy and go through the copper in the barrels of the PTH, reducing the thermal cycle to failure, but this is a rare condition.
A 10-layer HDI PCB at a 4-Layer Cost: Why This is Not Going to Happen
As sales manager, Chris Ryder is often asked questions along these lines: "How much does it cost to upgrade from a 2-n-2 to a 3-n-3?" The answer, much to the annoyance of the PCB buyer, is "It depends." But with HDI, a little planning and communication goes a long way.
Top 10 Key EMC Design Considerations
For years, PCB designers didn't worry too much about EMC issues. But now, designers are realizing that proper design techniques can indeed help to eliminate EMI. Ashish Kumar and Pushek Madaan of Cypress Semiconductor have crafted a handy Top 10 list of EMC design tips.
Design for Manufacturing: The Hidden Economy of HDI
Many designers still believe that HDI is an expensive technology, but columnist Amit Bahl relates an experiment that illustrates how HDI is sometimes the most cost-effective stack-up for a design.
HDI Technology: A Perspective for the Designer
According to Joe Fjelstad, HDI technologies perform a vital service to the broader electronics interconnection industry by providing a platform which can reliably support the interconnection needs of today's highly-integrated and component-dense electronic assemblies. High-density interconnections are provided in a variety of ways and determining which is best depends on the application's technical needs.
Measuring Correlation to 50 GHz and Beyond
Four essential elements of electromagnetic signal integrity analysis guarantee successful design of PCB and packaging interconnects up to 50 GHz and beyond. Each element of the design flow leads to success, and neglecting or missing even one may compromise the entire project.
Increased Performance with Cost-effective HDI Technology
With enhanced signal routing and response conditioning, HDI technology enables greater wiring density and closer component spacing. All these improvements are possible thanks to the use of thin film, high-density multilayer substrates.
Is the Cloud a New Paradigm for Electronic Design?
There's a buzz surrounding the cloud, and how computing is moving to it. Most know that a cloud is a remote storage location to back up files, but is it more than that? What is the cloud in the context of computing, and what are the benefits for PCB design companies?
Design for Profitability: Avoiding Fabrication Issues and Minimizing Costly Revisions
At last, PCB designers are finally realizing the power they wield: They have the power to design profit into the board, or, conversely, increase costs and remove profit from the PCB. Mark Thompson reviews the challenges fabricators routinely face and presents typical DFP solutions affecting the bottom line.
Zen & the Collaborative Art of Designing, Manufacturing, & Implementing Low-loss, High-speed Flex Interconnects, Part 1
To maximize performance improvements and ensure the success of advanced flex materials, new design and fabrication trade-offs must be understood by material suppliers, OEMs, and fabricators. This article represents collaboration between an OEM, a fabricator, and a material supplier with the goal of broadening flex circuits in higher-speed applications.
Design for Manufacturing: The 10 Commandments of Design for Assembly
The best way for designers to avoid problems during assembly is to communicate thoroughly and frequently with their assembly providers. But, just in case that doesn't work, columnist Amit Bahl has created The 10 Commandments of DFA to aid in the process.
ASTER Takes DFT to the Next Level
Christophe Lotz, founder and chief executive officer of ASTER Technologies, joins Editor Andy Shaughnessy to explain how his company's DFT software helps designers make boards more testable, from the schematic level onward.
Cadence Integrates Sigrity Capabilities
Brad Griffin, product marketing director for Cadence Design Systems, discusses his company's acquisition of Sigrity with Editor Andy Shaughnessy. Griffin also details the fairly seamless blending of the two companies' cultures.
Going Wild With Wild River Technologies
Wild River Technologies co-founder Al Neves joins Editor Andy Shaughnessy to update us on his company's latest endeavors, including the CMP 28 and 32--a tool that allows improved simulations and measurement.
Failure is the First Step on the Road to Success
It is an inexorable fact of life that all electronic assemblies, from the most complex, densely interconnected systems to the cheapest mass-produced consumer devices, will eventually fail. As manufacturers, suppliers, and designers, there is so much more that can be learned from these failures; we need only spend the time and effort to uncover the root of the problem.
EMI: What it Is, Where it Comes From, and How to Control It
There are a variety of technical books that address EMI and EMC. However, none of them really gets down to the basics of where EMI comes from, what it really is, why it is an issue, and what to do about it. Lee Ritchey takes a closer look.
Automating the Design Process
Patrick Carrier, technical marketing engineer with Mentor Graphics, joins Editor Andy Shaughnessy to discuss his company's new HyperLynx DRC, which automates much of the printed circuit board design process.
A Small Leak can Sink a Great Ship: EMC Behavior of Traces Crossing Split Planes, Part I
Laying out a trace across a split or gap with reference planes is a major EMC design rule violation. But often, PCB designers have no alternative other than to place some signals that cross cutouts, gaps, or voids underneath or above the routing path. Zuken's Ralf Bruening takes a closer look.
Novel HDI Materials from Integral Technology
Ken Parent, president of Integral Technology, describes to Guest Editor Joe Fjelstad his company's Zeta material, which offers improved manufacturing and performance possibilities to those designing and manufacturing HDI circuitry.
Acoustic Micro-imaging of Multilayer Ceramic & Polymer Capacitors
They are inexpensive and relatively simple in design, but multilayer ceramic capacitors (MLCCs) are nevertheless capable of causing unanticipated field failures whose severity may range from very minor to catastrophic.
A Tale of Two Loves
Ruth Conner, resource representative with RAD Services, relates to Guest Editor Kelly Dack the two loves her life--her new husband and her career-long association with all things IPC. She also describes an HDI design disconnect and the knowledge base of designers who can get the job done.
IPC Specifications and the Order of Precedence
Whether or not the initiator of the contract is an original OEM, or one building the product under its own name, a protocol exists for what specifications should be used to manufacture a product to ensure it meets the reliability and quality issues demanded by its design and operational cycle. EPTAC's Leo Lambert explains.
Design for Manufacturing: Dispense With the Gerbers Already
Most PCB designs are still expressed with Gerber graphic files, despite the clear advantages of the ODB++ intelligent unified file format. Nonetheless, IPC-2581, the open format for PCB description being hammered out by IPC, is likely to become the delivery vehicle of choice.
Twenty-Five Years of Simulation Stimulation
Special Projects Editor Kelly Dack and Dave Kohlmeier, Director, Mentor Graphics, look back over the 25-year history of HyperLynx, a simulation tool that tests timing and has stood the test of time.
Simberian: High-End Simulation for Designers
Yuriy Shlepnev Ph.D., president and CEO of Simberian, discusses his company's latest release, Simbeor 2013, software for designing PCBs and packaging interconnects operating at 6 to 100 Gbs and beyond. Shlepnev also demonstrates one of his newest projects.
Getting Active with Embedded Components
Vern Solberg, senior consultant with Invensas, talks about his work on the IPC-7092 standard on embedded components, as well as the challenges fabricators face when beginning the process of embedding bare die.
Letter: Let's Reestablish the U.S. PCB Design Community
Dan Smith may have been sniffing paint fumes, but that didn't stop him from writing a letter to the editor after reading a recent "Shaughnessy Report". He asks, "What will it take to reestablish the U.S. PCB design community as a significant new product contributor? More education? Smarter tools? Intelligent factories?"
EPTAC's Leo Lambert on Counterfeit Training
Leo Lambert, vice president and technical director of solder training and IPC certification corporation EPTAC, discusses the firm's newest training program developed with the help of IDEA, one designed to help customers better identify counterfeit parts.
The Shaughnessy Report: The State of PCB Design
Once again, it's the season for trade shows and conferences. After attending events like DesignCon and the Designers Forum at IPC APEX EXPO, I can safely say that the state of PCB design is sound, for now. The "graybearding" of the design community continues unabated, but the designers I met with at both shows are as enthusiastic as ever.
Data, Data Everywhere. But...
Transferring PCB data has been a big part of my career, especially for the last 10 years or so. From concept through assembly, a lot of data is used to describe the various aspects of a PCB, the components and final assembly. But I'd like to point out that in reality, there's not enough data. We actually need more.
Is the Cloud a New Paradigm for Electronic Design?
There's a buzz surrounding the cloud, and how computing is moving to it. Most know that a cloud is a remote storage location to back up files, but is it more than that? What is the cloud in the context of computing, and what are the benefits for PCB design companies? Dr. Raul Camposano and Steven McKinney shine some sunlight on the cloud.
Development Engineer John Coonrod discusses Rogers Corporation's high-frequency laminates and his paper concerning the topic of insertion loss and how his company's materials, combined with prudent design and manufacturing methods, can solve the industry's most challenging microwave challenges.
The State of Embedded Component Technology
EIPC Technical Director Michael Weinhold; AT&S Group Manager of Technology Johannes Stahr; and Somacis CTO Giacomo Angeloni hold a technical panel to discuss the state of embedded component technology today.
Sanmina: Leverage Your Fabricator's Knowledge!
Brian Nelson, NPI manager for PCB fabrication processes at Sanmina, discusses some of the issues his customers face every day. He encourages designers to take advantage of their fabricators' years of manufacturing experience.
Kick-Starting a Revolution: IPC-2581 Meets Gerber
The all-or-nothing approach to improving the CAD-to-CAM workflow benefits nobody. Karel Tavernier of Ucamco proposes keeping what works in Gerber (the image data format), and changing what doesn't work, such as the stackup data format. And stackup is an area in which IPC-2581 excels. Other IPC-2581 sections could be integrated with Gerber, and "good old Gerber" could eventually be retired.
A New Layout Tool, From Russia With Love
Renowned for its coding expertise, team DipTrace of Ukraine debuts a new PCB layout tool with full features at an entry-level price. Guest Editor Kelly Dack engages in a little detente with Novarm CEO Stanislav Ruev, and learns some Russian along the way. Da, comrade!
EMA Design Automation Ready for 2013 and Beyond
EMA Design Automation's Greg Roberts discusses the latest developments in the OrCAD tool family, and he explains how Cadence's acquisition of Sigrity benefits the entire Cadence tool family.
Trace Currents and Temperature, Part 2: Empirical Results
In this second of a four-part series on trace currents and temperature, Doug Brooks explores various results that have been empirically obtained. Subsequent parts will explore how we can use the melting temperature of a trace to our advantage, and how to deal with vias.
Your Design Education, Your Responsibility
Rick Hartley, senior principal engineer with L-3 Avionics, discusses several classes he presented at IPC APEX EXPO 2013 and The Designers Forum. He explains why designers and engineers should continue their design education throughout their lives and how colleges so often drop the ball when it comes to teaching design.
Lee Ritchey: Designing a PCB Stackup, Part 1
The challenge in designing a PCB stackup is to satisfy its many demands. Information in this article is drawn from Lee Ritchey's experience gained by designing more than 2,000 PCB stackups for products as simple as video games and as complex as the highest-performance backplanes used in supercomputers and routers
Collaborate, Innovate, Accelerate
SiSoft Vice President of Software Products Todd Westerhoff discusses the company's new motto, "Collaborate, Innovate, Accelerate." He explains that by working closely with customers, SiSoft can help push companies to faster speeds than ever thought possible.
Effective Modeling of PCB Structures
Mentor Graphics Market Development Manager Rod Dudzinski describes electromagnetic circuit simulation using HyperLynx 3D EM. Vias and other structures can be simulated efficiently, effectively taking the guesswork out of modeling PCB structures.
Maxed Out: Radiation vs. Your Embedded System
Max Maxfield's Design West presentation will explain how radiation can affect components and systems, slowing things down over time and causing functional errors. It's surprising how little most folks know about radiation. When Max asked his wife what she knew about radiation, she replied, "Only that I don't want to be in the same room as it!" But many engineers and designers would agree with her.
Connecting the Dots: So You Want to be a Designer?
Welcome to the first in a series of short tutorials by Jack Olson focusing on becoming a circuit board designer. If you're new, there's a lot to learn. We'll explore the PCB design process one step at a time, explaining the terminology and adding more pieces to the puzzle from month to month.
Partner Early for HDI Board Design
When customers want to design boards that are as compact as possible, there is often very little reliable guidance from the chip vendors. Heed the warnings of Texas Instruments: Consult board manufacturers from the start of any projects involving BGAs with a pin pitch of 0.4 mm and smaller.
Training Day at Circuit Technology
Bob Doetzer, president of Circuit Technology, explains why his IPC-certified training center has become a training partner for its customers. Companies now want his company to provide the training eliminated in the past few years. Doetzer expects to see a continued need for Mil/Aero training going forward.
PCB Insertion Loss Variation in Manufacturing: A New Low-Cost Metrology
Signal integrity analysis has shown that PCB insertion loss is a key factor in high-speed channel performance. Determining and controlling PCB insertion loss have thus become critical production requirements for achieving multi-gigabit-per-second data rates.
The Millennials: Talking 'Bout my Generation
Nordson DAGE's Hal Hendrickson serves on the SMTA Board of Directors, and he's been studying the generational differences between baby boomers and the much younger "millennials." He points out that there are nearly as many millennials as baby boomers. What will our industry look like when it's run by people born in the 1980s? Get a glimpse of the future.
He Wrote the Book on PoP Technology
Industry veteran Bob Willis sits down with Editor Andy Shaughnessy to talk about his upcoming book covering package-on-package (PoP) technology. This detailed e-book will go through each stage of the manufacturing process: Components, design, assembly, quality control, reliability, and much more.
Maxed Out: A Great Time to be a Technology Geek
There's a good chance that, if you're reading this, you may be a technology geek. But geeks are cool now. Even the word itself no longer has the negative connotation that it used to have. In fact, it's a great time to be a geek. There are so many cool electronic products and gadgets, and so little time!
A Time-Dependent Analytical Analysis of Heat Transfer in a PCB During a Thermal Excursion
A great deal of work has already been done to determine the equilibrium temperature of a PCB when exposed to a heat source such as the thermal environment of reflow soldering. This study by J. Lee Parker goes beyond the equilibrium condition to explore the temperature-time distribution of a PCB when a variable-temperature heat source is applied to both outer surfaces.
New Invensas Package: Smaller, Faster, Cheaper
Veteran technologist Vern Solberg is now a consultant with Invensas, a subsidiary of Tessera, his former employer of many years. Vern discusses a paper he gave at SMTAI detailing Invensas' new package technology that is faster, smaller and cheaper than other package options.
Bringing Back Operations in North America
"About 11% of electronics manufacturers in North America have brought operations back since 2009, while nearly 20% created new operations in North America instead of establishing them elsewhere," said Sharon Starr, director of market research for IPC. On-shoring isn't a huge trend, but it accounts for significant revenues and many jobs.
Tech Circuits: Everyone is in Customer Service
If you visit your fabricator, can you speak with the person who handles your specific designs? Stephanie Zarrella explains why Tech Circuits' customers can always speak directly to the technologists working on their boards. She also discusses Tech Circuits' preparation of prototype boards for volume production offshore.
BGA Symposium Draws a Good Crowd
BEST held a successful BGA symposium at IPC Midwest 2012. President Bob Wetterman discusses the content and "takeaways" from the event, as well as attendees' concerns, including DFM for BGAs.
John Isaac: "Left-Shift" to Improve Complex PCB Designs
The most efficient way to design electronic products is by taking the entire process, from the spark of idea through shipping product out the door, and left-shifting it as far forward in the process as possible. By considering specific issues far in advance, re-spins of the PCB and issues that could cause product recall are minimized or eliminated before a PCB is etched and drilled.
Metal in the Board: A Return to the Future
The combination of package developments in power applications and a focus on energy efficiency is giving rise to major growth opportunities for metal in the board technology (MiB) around the world. The thermal dissipation capabilities in particular are making MiB an essential contributor to the solid-state lighting revolution. Nick Pearne and Bill Burr explain.
Nanomaterials Developments Yield Opportunities in PEC
The development of nanomaterials for printed electronics is creating exciting new structures--making it possible to improve applications that rely on traditional materials. Mainstream applications for non-electronic structures have existed for many years and Dr. Alan Rae explains that mainstream electronic products are improved by nanomaterials' unique properties.
Maxed Out: The Forgotten Magnetic Wire Recorder
If I were to ask you what cool invention came along after the gramophone, I wouldn't be surprised if you said, "Surely, it would be the tape recorder." But you would be wrong! Before the magnetic tape recorder appeared in our lives, there were these nifty little things called magnetic wire recorders. And I've managed to acquire some of this old wire. Read on!
Virtual Prototyping: A System Design Requirement
Virtual prototyping is rapidly becoming the standard for complex system design. There are many advantages to virtual prototyping over physical prototyping. These include product quality, product competitiveness, and reduction in design cycle time. The days of using physical prototypes for debugging are limited!
LED Market Drives Demand for New Laminates
Ventec's Bruce Hurley discusses how the LED market has driven the demand for materials that transfer heat efficiently. Standards need to be further developed in this area. Apples to apples product comparisons are a challenge right now and long-term reliability studies need continue to be conducted.
Accelerated Reliability Testing: Interconnect Stress Testing vs. Accelerated Thermal Cycling
The High Density Packaging User Group's extensive testing of plating through-hole reliability with PCB test vehicles made of 20 different lead-free laminate materials proves that interconnect stress testing can be used in place of accelerated thermal cycling for long-term reliability estimates, delivering results up to an order of magnitude faster. Joe Smetana explains.
L3 Communications Develops Reliability Training Programs
L3 Communications has embarked on a series of training programs designed to enhance its aerospace products' reliability and productivity. Supervisor and Master IPC Trainer Rob Fornefeld talks with Editor Ray Rasmussen about the program, how it began, and where it stands today.
Printed Electronics Standards and Technology Update
John Andresakis talks with Ray Rasmussen about the expanding printed electronics market. IPC has made printed electronics a technology priority, and Andresakis delves into some of the progress the organization has made with standards and technologies for the PEC industry.
Maxed Out: A Man on the Move
Boy, am I exhausted. I am in the process of moving my office. You wouldn't think this would be too much trouble, considering the fact that I'm only moving from one bay to another in the same building, but the task is proving to be harder than expected. And where did I get all of this stuff? Boxes upon boxes, and a lot of it is going in the trash. Naturally, the lift in the building broke down last week. Give me strength!
New Column: Six Keys to PCB Design Excellence
This column begins a series of six that will discuss a variety of PCB design and manufacturing problems, and possible solutions. John Isaac kicks off the series by discussing management of intellectual property.
Maxed Out: I'm Radioactive, But in a Good Way
Work continues on my huge mosaic of Van Gogh's "Starry Night," with a little help from a type of glass I just found out about: Van Gogh glass. And testing my homemade Geiger counter became much easier when I discovered that Amazon does, in fact, sell handy-dandy cans of radioactive uranium ore. Is there anything Amazon doesn't sell?
Brad Griffin: Cadence Allegro Update
Guest Editor Kelly Dack interviews Brad Griffin, product marketing director for Cadence Design Systems, to find out more about Cadence's recent enhancements to its Allegro tool suite.
From Concept to Manufacturing With Zuken
Guest Editor Kelly Dack queries Zuken's Senior Technical Marketing Manager, Humair Mandavia, about Zuken's new CR-8000 suite of tools that promises a fresh approach to design solutions, from concept to manufacture.
Data Format Update: ODB++ Development Continues
During NEPCON China 2012, PCBDesign007 China Editor Edy Yu sat down with Ji Wei, channel capability manager with Mentor Graphics. They discussed the current and future development of the ODB++ data transfer format, which has been in the news quite a bit lately.
The Fabricator's Newest Tool: The Call Center
For many prototype PCB makers, survival has depended upon being nimble, resourceful and of high value to design teams. The emergence of the e-commerce model meant that a local fabricator could develop a global customer base. But e-commerce-based board makers have a reputation for being difficult to reach. Now, the savvy PCB manufacturer is investing in the latest, greatest tool in a company's toolkit: the 24/7 call center.
The Business and Technology Climate in China
Rich Chenoweth, VP of global sales and marketing for Maskless Lithography, talks with Guest Editor Marcy LaRont about the business climate in China, as well as technology trends there. He sees an expansion of Chinese companies that serve the China market.
A View of the European and Chinese Markets
Erhard Hofmann, managing director of AdoptSMT Group, discusses the European and Chinese PCB markets. Based in Europe, AdoptSMT Group is a global supplier of previously owned equipment and spare parts.
Karel Tavernier: Gerber Definitely Not "Dumb" Data
Karel Tavernier, managing director of Ucamco, owner and caretaker of the Gerber format, replies to Julian Coates' letter: "First, what is Gerber? It is an image description language used specifically by the bare board industry that enables PCB designers to transfer accurately and reliably even the most complex PCB design data, including drill data. It is a superlative image description format. No more, no less."
Maxed Out: Ray Bradbury Takes Flight
There were a number of science fiction authors whose works I devoured when I was growing up, such as Robert Heinlein, Isaac Asimov, and Arthur C. Clark. And, of course, the works of Ray Bradbury were a cornerstone of my collection. Ray had a unique style that really set him apart from the crowd.
Zuken Keeps its Eyes on the Cloud
Zuken Senior Technical Marketing Manager Humair Mandavia and Editor Andy Shaughnessy discuss the company's plans to utilize cloud computing for its tool sets, now and into the future.
Andy Kowalewski: Time for a Single Data File Format
Some design files go overseas, some stay local and all need to have thought put into them. Mistakes can happen easily; I've been embarrassed more than once to discover the wrong files were sent, or files were missing. The single, standard file format is an absolute blessing, right up there with food, clothing, shelter and quality red wine. By Andy Kowalewski.
HyperLynx: Not Just an SI Tool Anymore
Steve McKinney of Mentor Graphics describes the evolution of the HyperLynx tool. In just a few years, HyperLynx has gone from a signal integrity tool to a full PCB design analysis suite.
Maxed Out: Of Birthdays and Treadmills
Well, as usual, I'm bouncing off the walls with excitement. I just celebrated a birthday (I'm now middle-aged, assuming I live to be 110) and I've decided to stop being a "desk potato" and get some exercise. I invested in a super cool treadmill desk that allows you to work on your laptop while walking on the treadmill. Before you know it, I'll have 6-pack abs!
Pyralux TK Scores TKO on High-Speed Challenges
Guest Editor Kelly Dack speaks with DuPont's Glenn Oliver and Mark Dirks about their new Teflon/Kapton laminate system that's used worldwide to address signal integrity issues.
Maxed Out: Two Longs and a Short
We columnists love to get e-mails from grateful readers. This week I'll share an e-mail from a reader whose story may sound familiar to you, especially if you've been in the industry long enough to have "senior" in your title! And we have some recommendations from Max's Book Club; it's not a popular as Oprah's Book Club (yet), but hope springs eternal!
Maxed Out: Apple Takes Over my Home
I don't know why, but for some reason I thought that Apple TV referred to a digital TV that was in some way "Apple-compliant" or "Apple-friendly." Oh, was I wrong. Apple TV actually refers to a little box that sits next to your regular digital TV and connects to it via an HDMI cable. The Apple TV also connects to your wireless router, thereby allowing you to stream content from the Internet and/or from your iPad or whatever. Apple continues its conquest apace!
Letter to the Editor: Gerber's "Dumb" Data is no Advantage
Last week's column about the recent SMTA Atlanta Designers' Roundtable held struck a chord. The section about data transfer formats (everyone in the room used Gerber, and many used both Gerber and ODB++) drew this letter to the editor from Julian Coates of Mentor Graphics. Are there really any advantages to using Gerber?
Maxed Out: In My Day, Part 2
This week, Max posts a bit of fan mail and continues to look at advances in telephone and television technology. We forget how far TVs have advanced in a few decades. In the old analog days, it was common for the TV image to move so that the upper part of the picture disappeared and reappeared at the bottom of the screen. You might be watching "I Love Lucy" with her head and torso at the bottom of the screen and her legs walking around above her. Some of you remember!
Manufacturing Perspectives: Europe, US and China
Guest Editor Michael Weinhold of the EIPC talks to industry veteran Gene Weiner. They compare the recent lineup of industry trade shows and discuss their differing views on the state of the industry's growth and the world's economies.
Polar Enhances its Impedance Test System
Polar Instruments' Ken Taylor chats with Guest Editor Mark Thompson during IPC APEX EXPO about the company's Controlled Impedance Test System and Polar's outlook for the future.
Gary Ferrari Updates on IPC-2221 Design Standard
Gary Ferrari, director of technical support at FTG Circuits and IPC Designers Council founding member, speaks with Guest Editor Bob Neves about the activities of the council and the upcoming revision to the IPC-2221 Design Standard.
Benefits of Coplanar Waveguide Over Ground
Why should we consider using coplanar waveguide over ground (CPWG)? It allows us to narrow the trace almost arbitrarily for a given layer thickness while maintaining a 50 or 75 ohm impedance. CPWG also allows less current into the air than a microstrip structure, because the topside ground copper shunts the field current locally to the topside ground. By Steve Hageman.
Chip and PCB Co-design: Cut Costs and Improve Quality
Nearly every IC finds its way onto a PCB. Despite this fact, most PCB designs are an afterthought and never considered in the planning of the chip. The PCB is difficult to complete on a minimal number of layers and signal integrity is often compromised. But these problems can be solved by implementing a cross-domain co-design methodology that considers the layout requirements of the PCB (without looking over the package substrate) in the context of floor-planning the chip.
Nippon Mektron Prepares for New Printed and Flex Products
Nippon Mektron's Dr. Hirofui Matsumoto provides a glimpse of several printed and flexible electronics products that the company has been developing. His company has established a robust supply chain of printed electronic materials suppliers to ensure new product introduction success. Nippon Mektron, a 40-year old company, is excited about the potential of printed electronics product opportunities and actively pursuing them.
PCB Libraries: A Global Library Vending Machine
PCB Libraries is back! And, as PCB Libraries President Tom Hausherr explains, the "new and improved" PCB Libraries is on track to become the world's first Global Library Vending Machine, $1.00 at a time. Why shouldn't designers who spend hours creating library parts earn royalties for these parts?
Intercept's Design Software Moving Into 3-D
Intercept Technology recently revamped the GUI of their Pantheon design suite. North American Sales Director Dale Hanzelka chats with Editor Andy Shaughnessy about the new interface, the challenges their customers are facing, and the drivers behind Intercept's journey into the third dimension.
MIA: The Next Generation of Designers?
San Diego design icon Mike Creeden discusses the morning presentations here at the Designers Forum, including his take on the critical need for PCB design education. He also outlines plans for Tuesday night's Designers Council meeting hosted by his company, San Diego PCB.
ODB++: An Open Alliance
ODB++ has long been considered a de facto standard as a CAD database exchange format. But is it an open format? Julian Coates of Mentor Graphics explains why the term "alliance" is used to describe how ODB++ serves as a data hub for any software tool that must work with other tools to bring a design from layout to manufacture.
Bruce Archambeault: EMC Issues A Fact of Life
Dr. Bruce Archambeault, distinguished engineer with IBM, discusses the state of EMC, and why so many designers and engineers of all stripes attend DesignCon for help with analysis.
PCBs: Not Old-Fashioned Technology After All
Noted author and blogger Brian Bailey discusses the many characteristics that the worlds of ICs and PCBs have in common, and why PCBs should not be considered old technology.
Business Drivers for Next-Generation Materials
It's said that nothing happens in a vacuum. Oak-Mitsui's Bob Carter, Director of Business Development and Technology, explains how advancements to the next generation in one component often drive changes in other areas, including materials developed by his company.
Your AMI Model: A Peach or a Lemon?
Dr. Michael Steinberger, lead architect of serial channel products at SiSoft, discusses his hit DesignCon tutorial, "AMI Models: How to Tell a Peach From a Lemon." He and Todd Westerhoff, SiSoft's VP of software products, led the half-day tutorial, which drew a big crowd.
The State of PCB Design, 2011
While the economy slouched through 2011, the electronics industry, and PCB design and fabrication in particular, and showed signs of recovery. Is this market segment a bellwether of the economy? That's best left to the economists, but hopefully the rest of the economy will indeed increase its crawl from recession.
Cost Savings of Copper Wire Bonding
Copper wire bonding offers a substantial cost saving over gold wire bonding in packaging applications. Mustafa Ozkok, Atotech's Global Product Manager, Selective Finishing, tells Editor Pete Starkey how electroless palladium direct on copper offers an ideal substrate finish.
Practical Experience Manufacturing PCBs With Embedded Active and Passive Devices
The Advanced Multilayer process for embedded devices was developed in the mid-1990s and patented in 2004. Standard active and passive components are suitable for the AML process technique. The component attachment uses soldering or gluing with adhesives or any other technology like wire bonding, plating or sintering.
Thermal-Electrical and Mechanical Simulation of Packages
Kirsten Weide-Zaage offers a look at some new phenomena surrounding thermal-electrical and mechanical simulation of PoP, microBGA and TSV packages. Her department at the University of Hannover works with industry partners on a variety of projects related to advanced packaging.
SMT Perspectives and Prospects
Over the last 10 years, Dr. Jennie S. Hwang has received many questions about best practices when a PCB comprises lead-free packages, tin-lead packages using lead-free solder paste, or lead-free solder paste. Concerns often arise regarding the resulting performance and reliability level in each scenario.
The Bare (Board) Truth: What you Want vs. What you Get
This month, I hope to provide a better understanding of fabricator practices and preferences vs. design preferences. As Mick Jagger might say, "You can't always get what you want." But if you work with your fabricator, you'll usually get what you need anyway. Let's start with material selection and go from there.
Polar Fine-Tunes Flex-Rigid Stack-up Design Software
Martyn Gaudion, CEO of Polar Instruments and a PCBDesign007 columnist, tells Pete Starkey about the latest developments in design and documentation tools for flex-rigid stack-up. He discusses the background behind the development of Polar's Speedflex platform, and the need to keep such a potentially complex tool user-friendly.
Walt Custer Interprets the Market
This year, we've had the Fukishima disaster, the floods in Thailand, the U.S. debt and political stalemate, along with the financial crises facing Europe with the possible default of Greece and Italy. Market guru Walt Custer has had his hands full, but he sorts through all of the noise in this market update.
The Shaughnessy Report: Simplified Solutions Merges ECAD, MCAD
The gap between mechanical and electrical CAD continues to shrink. Keith Richman, president of Simplified Solutions, discusses his new IDF-To-3D tool. This free tool allows PCB designers and engineers to create 3D PCB designs without using MCAD software.
Travel Tips from RealTime's Unsung Hero, Kirk Wallace
Just in time for the holidays! I-Connect007 videographer Kirk Wallace, the unsung hero of the RealTime with...productronica team, offers his tips for transporting expensive camera equipment by air. Not to be missed for all you air travelers! For extra credit: Who do you think stole our camera - the airline or TSA?
Maxed Out: From Steam Engines to Wind Walkers
My degree is in control engineering, which means I studied electronics, mechanics, hydraulics and fluidics. But it's only been recently that I've come to appreciate mechanical systems as the things of beauty that they are. This week we'll take a look at a few mechanical systems that date to antiquity, and then focus like a laser (I should build a laser...) on my most recent project - The Wind Walker.
ODB++ Format Development Update
There's plenty of talk about data transfer standards these days. Mentor Graphics Business Development Manager Dave Wiens explains how ODB++ continues to evolve, thanks to a large installed base, and he also discusses the IPC-2581 transfer standard.
What is Trace Impedance and Why Do We Care?
When we hear the term "controlled impedance" trace, our first confusion might come from this question: Why does a trace have any impedance at all? And if it does, what does it mean that we somehow control it? And how is it that a trace has a potentially significant AC impedance? In this column, Doug Brooks examines these issues and much more.
Top 10 Issues In IBIS Models
Does your company perform incoming inspection on IBIS files? Incoming quality can be checked in a matter of minutes for many models. Once a file has passed QA, it can be placed in a shared model library. Familiarity with the IBIS website and the IBIS 5 spec can make troubleshooting models faster and easier. Here are the Top 10 problems encountered when using IBIS models. By Lynne Green.
Maxed Out: On the Road to Redmond
You never know what life may bring. I was just invited to give a talk at Microsoft's main campus as part of a really cool extravaganza on September 28. All I know for certain is that pianist Patrick Leonard (of Elton John and Madonna fame) will be performing, and I can speak about any topic I choose. Bill Gates may live to regret that!
Bridging the Design-Fab Gap
Yash Sutariya, Vice President of Corporate Strategy at Saturn Electronics, sits down with Editor Pete Starkey after his presentation "Bridging the Gap Between Design and Fabrication." Interestingly, most of the audience were fellow PCB fabricators--not the designers to which he'd intended on speaking.
Maxed Out: A Need for Mentoring Programs
My first employer, International Computers Limited, had a really good mentoring policy: Junior engineers like me were partnered with experienced team leaders. I'm pondering this now because I recently heard from a young design engineer at a large aerospace firm. The problem? No one is mentoring him. They just give him tasks and leave him to sink or swim. Does this sound like your company?
Mentor Graphics Embedding Valor Functionality
John Isaac of Mentor Graphics explains how the functionality of the Valor suite of DFM tools will be embedded into the Mentor Graphics PCB design tools, and how the two companies' cultures have meshed over the past year.
Be the "Go-To Person" at Your Company
Tellabs Principal Engineer Randy Cherry discusses why he's fired up about his job after watching a presentation by Rick Hartley at the Designers Forum in Las Vegas. He also details some of the challenges he faces qualifying new PCB fabricators and finding quality laminates at a reasonable price point.
Data May Not be Modified!
Or can it? Mike Tucker, Director of Engineering at Colonial Circuits, presented "Data May Not Be Modified" at this year's Designers Forum in Las Vegas. As he tells Guest Editor Kelly Dack, the presentation relates to how fabricators' hands are still tied due to PCB designers' requirements. Tucker has tips for breaking these ties that bind.
PCB Design, Fab and Assembly With Mass Design
Mass Design's founder Tony Bourassa explains the company's business which offers customers a rare service: Design, fabrication and assembly of PCBs in one location to help shorten time to market.
Knowledge is Power
Knowledge is power, and Germany wants to keep its educated designers from leaving. Professor Rainer Thuringer is a representative of the Federation of Electronic Design for Germany, Switzerland and Austria, and a university professor who teaches high-speed PCB design. He discusses the challenges in recruiting new European design students, his federation's partnership with IPC, and Germany's drive to keep electronics design talent in Germany.
Education Aspect Big Draw at Designers Forum
Chris Kershaw is principal PCB engineer at TAIT Radio Communications, a New Zealand-based company that builds two-way radios and infrastructure products. Kershaw explains how he passed his CID+ at APEX, and why he brought along staff members to learn new design techniques. He also discusses the company's help in the rescue effort after the Christchurch earthquake.
Zuken Claims Bigger Market Share
Second place is not such a bad place to be. Zuken Application Engineer Griff Derryberry believes Zuken's market share is rising, and he discusses an article that puts Zuken in the Number 2 spot worldwide.
Methods of Modeling Differential Vias
Accurate models for vias in a multilayer circuit board are necessary to predict link performance in the GHz regime. This paper describes a methodology to build a high-bandwidth, scalable first approximation circuit model using simple transmission lines of long vias typically used in thick backplane designs. Written by Bert Simonovich, Dr. Eric Bogatin and Dr. Yazi Cao.
Saving Time, Money with SI 'Simulation Lite'
Is it always necessary to conduct a lengthy signal integrity analysis when designing a multi-gigahertz PCB? Intel Principal Engineer Rich Mellitz says no. He discusses his DesignCon paper on "Simulation Lite," which describes a simpler method that can be just as accurate and far less time-consuming.
Engineering Startup on the Road to Success
There's no time like the present: When engineers Al Neves and James Bell had an idea for starting a new company, they didn't wait for the economy to improve. They launched Wild River Technology and never looked back. At DesignCon, Al sat down to discuss the founding of the company, the direction it's headed, and how their love of fly fishing shaped their plans.
Stadium Reports 27% Revenue Increase in 2010
Commenting on the company's outlook, Chairman Nick Brayshaw OBE said, "We remain optimistic that continued growth will be achieved from existing products and customers and will continue to win new business to increase our market share as the key to future success."
Estimating PCB Design Time and Complexity
One thing that I have had to do on my new PCB jobs is to make an estimate of how long the layout will take, or if it is even possible, given the PCB area. Most designers have some method of estimating design time, based on gut feel, past experience, or a spreadsheet. Here is a better way to estimate PCB design time and complexity.
DesignCon 2011 Show Wrapup
DesignCon 2011 is history, and this show seemed much busier than last year's event. This marked the first DesignCon since EE Time Group acquired the show last year. Sure, there were a few missteps - exhibitors complained that event staffers were unorganized, and speakers were furious over certain changes. But this show is a good omen for 2011.
IBIS AMI Standard Update With SiSoft
Todd Westerhoff, VP of software products for SiSoft, updates us on the ever-evolving IBIS AMI modeling standard, which SiSoft has taken a leading role in managing.
Designers' Guide to Lead-Free SMT
If you design boards for the European Union, this technical paper is for you. Vern Solberg addresses three issues designers need to consider during the planning phase of new product development: Component selection for lead-free applications, product exemption criteria and specifying compatible PCB material and finish. This paper was presented at IPC APEX EXPO 2009.
Maxed Out: Home is Where the Heart Is
Now that we've recovered from our vacation time and Snowpocalype 2011 has ended, we're all getting back in the swing of things. As usual, I'm running around in ever-decreasing circles and putting out fires, but I have an update or two for you.
Get it 'Right the First Time' With 3D STEP Models
PCB design tools are evolving, albeit slowly. Simulation tools now allow us to do amazing work before we build hardware. But we have been lacking this same tight integration from our CAD tools to the mechanical domain. Now this is changing, as more 3D STEP models are available, along with PCB design tools that can import them.
Tom Clifford: Science Fairs Offer View of Future Technologists
I recently judged a couple of junior high school science fairs. What an unforgettable experience! One youngster couldn't find any HP gages that were "good enough," so he wrapped a few coils around a hiker's compass, calibrated faint needle deflections, and captured the necessary data, now in micro-amps, accomplishing his purpose with elegant simplicity. The future is bright.
Designers Notebook: Defining Package Variations, Part 1
To assist the PCB designer and assembly process engineer considering use of these package families, an IPC task group developed IPC-7093, a new document that furnishes both guidance and end-product requirements. This month, we look at the many package variations of bottom termination components covered by IPC-7093.
Training Trends With Blackfox
The last few years have been tough for everyone, especially in the world of high-tech training. But CEO Al Dill of Blackfox Training Institute believes the worst is over, and he explains why training is picking up again.
PCB Trends With David Wolf
The D-36 Subcommittee is responsible for the IPC PCQR2 Database of test results from fabricators worldwide. David Wolf, VP of technical marketing for Conductor Analysis Technologies, discusses the subcommittee's latest efforts and the technology trends he's seeing in global test coupons, including aggressive inner-layer aspect ratios and an increase in HDI use by the mil/aero segment.
Intel Strives for Compatibility at Board Level
Intel breaks technological ground at the chip level while working within the mainstream of PCB manufacturing and assembly. Process Development Engineer Steve Vandervoort sat down with Editor Andy Shaughnessy at SMTA International to explain how Intel negotiates this balancing act.
Gary Ferrari: Embedded Design Document Gets Active
Gary Ferrari, director of technical support for FTG Circuits, is working to improve IPC's embedded design guide. He discusses its focus on active components as well as passives, and the guide's trajectory toward becoming a full-fledged document.
Manage Your Vias, Manage Your Design
As a CID and CID+ instructor for IPC, Kate Mayer is fond of saying "Manage your vias and you manage your design." She explains how these little holes went from being "necessary evils" to the linchpin of the modern PCB, and offers designers tips on managing their vias.
Video: Designers Council Eliminates Fees
A designer once said, half-jokingly, that he'd love to join the IPC Designers Council, but the $50 annual fee would be better used to feed his family. But now you can join the DC without starving your children. Anne Marie Mulvihill, IPC's director of professional development and the Designers Council, discusses the elimination of the DC fee, as well as plans for Designers Day at APEX 2011.
Don DeGroot Goes High-Speed With D-24 Subcommittee
Don DeGroot, President of CCNi and chair of the D-24 High-Speed/High-Frequency Test Methods Subcommittee, details the group's latest efforts measuring characteristic impedance, dielectric constant and dielectric loss and more.
Vern Solberg Gets to Bottom of IPC-7093 Spec
Packaging guru Vern Solberg of STC and Guest Editor Kelly Dack get to the bottom of the new IPC-7093 specification that provides land pattern and other guidelines for bottom termination components. Learn how quickly a spec can be developed when it's on the "fast track."
Optimizing BNC PCB Footprints for Digital Video Equipment
Today's video equpment operates at gigabit rates, necessitating the use of large coaxial BNC connectors. Non-optimized BNC footrpints can cause impedance mismatches, reflections and signal loss. In this paper, Tsun-kit Chin of National Semiconductor discusses some common issues with BNC footprints, such as problems with the connector-to-board transition, and offers techniques for transparent footprint designs.
Microstrip Line Characteristic Impedance and TDR
The characteristic impedance of a microstrip line is a complex function of frequency. Impedance changes are usually measured with time TDR, but does the observed impedance value depend upon rise time? What impedance value is actually visible in TDR of a line segment? Yuriy Shlepnev investigates in this app note.
New Column: Kate Mayer's "Connect With Kate"
To often, OEMs push PCB design projects onto their electrical engineers, computer technicians -- basically, anyone but the PCB designer. But it usually winds up costing the company time and money. That's what happens when companies try to trivialize our profession!
Better Never Than Late
Engineers can now work concurrently--on the same database--entering schematics and constraints. As they are working, they can even see edits from other project engineers in real-time, set protection barriers, reduce wasted communication efforts and coordinate efforts to maximize productivity.
Crosshatched Planes in Impedance-Controlled Flex-Rigid PCBs
While RF purists may feel discomfort at the thought of using crosshatch as a high-frequency return, using crosshatched planes on flex and flex-rigid PCBs is a realistic method of keeping impedance-controlled traces at a manufacturable dimension and retaining the desired flexibility of the assembly.
Maxed Out: My Creative Juices are Flowing!
I'm signing in from jolly old England this week, as we prepare for my dear old mother's 80th birthday. But I'm currently vacationing without my luggage, with which I hope to soon be reunited, so I have time to update you all on my successful smoke test of the "Man vs. Woman Display-O-Meter." A lack of smoke is always a good thing!
Understanding Propagation Loss
Guest Editor Mark Thompson chats with Richard Mellitz, Principal Engineer with Intel Corporation, about propagation loss--listen to discover exactly what propagation loss is, its significance and the future for specifications defining the issue.
Making the Circuit Design ECOsystem Work
The Circuit Design ECOsystem was created to help make life easier for design teams. But who are the typical customers, and how do they utilize the ECOsystem? Ray Rasmussen concludes our ESC Silicon Valley 2010 interviews with representatives of Screaming Circuits, Sunstone Circuits, NXP and National Instruments.
Does a Material's Dk Always Influence a Circuit?
John Coonrod, Market Development Engineer for Rogers Corporation, delivers a paper, "Laminate Dielectric Properties and Characterization," at APEX detailing Dk and its influence on high-frequency circuit construction. Test results found that, depending on how testing is done and how a circuit is designed, Dk may or may not influence the circuit.
Parker: Overcoming Embedded Capacitance Reluctance
The industry has been reluctant to use embedded capacitance materials. J. Lee Parker sits down with Mark Thompson to discuss why designers should look at buried capacitance, including EMI suppression, decoupling, and bypassing capacitance on top of the board in favor of less expensive innerlayer real estate.
Alternate Methodology for Measuring Loss Tangent of PCB Laminates
In a limited-scope laminate study, SUN Microsystems has looked at the dielectric loss tangent of a few materials. It became apparent that no one method that we looked at could accurately measure Df alone over a sufficiently wide band of frequencies due to various limitations of the associated method.
HDI is Coming--Are You Ready?
HDI design technologist Dan Smith, sometimes known as the "New Mr. HDI," is creating an HDI design certification for IPC. He and Andy Shaughnessy discuss his Designers Day class and the need for HDI design education, as well as his quest to build upon the works of HDI authors Happy Holden and Charles Pfeil.
It's Only Common Sense: Selling APEX
It never fails. At every trade show, you see exhibitors with booths manned by staffers who are busy reading newspapers, eating, or having deep conversations, while potential customers walk right by. There's an entire cottage industry devoted to studying the behavior of trade show attendees, and for good reason - a lot of companies don't know how to market themselves effectively at trade shows.
Physics-Based Via and Trace Models for SI/PI Co-Analysis
Physics-based models for vias and traces are applied to simulate multilayer interconnects on PCBs. In this DesignCon 2010 paper, a variety of interconnect structures are studied with model-to-hardware correlation. These models also enable efficient signal integrity and power integrity co-analysis with focus on modeling simultaneous switching noise coupled into high-speed signal nets as well as understanding the effects of decoupling capacitor placement.
Documentation Becoming More Important to Managers
DownStream Technologies exhibited at DesignCon for the first time. Founder Rick Almeida explains why, and he offers insights into how PCB documentation is becoming a greater concern for engineering managers-especially as designers and EEs spend more time doing documentation than designing PCBs.
Frequency-Dependent Material Properties
At DesignCon, I presented a paper on causal models for materials. Whenever you go from a frequency domain into the time domain, you have to worry about causality. If you care about high-speed serial links and use FR-4-like materials, you should care about frequency-dependent material properties.
Michael Steinberger on SiSoft's Model Strategy
The IBIS Algorithmic Modeling Interface has simplified the task of serial link simulations by - among other things - allowing models from different chip makers to work together. Dr. Michael Steinberger of SiSoft talks with Guest Editor Kelly Dack about SiSoft's work developing and fine-tuning the IBIS/AMI standard.
Maxed Out: Of Technology, Cells and Genes
In which we learn - amongst many other things - how the iPad fares in comparison to the Kindle, how much our genetic makeup can change in one generation, and whether Christopher Columbus did, in fact, discover America. Read on!
Telling the Whole Story With Sunstone
Good communication between design and fab is critical to your board's success. Sunstone product manager Nolan Johnson and Kelly Dack discuss what designers and fabricators must do to streamline communication in order to yield profitability.
HyperLynx Wins DesignVision Award
Mentor Graphics was a finalist in the DesignVision Awards at DesignCon 2009. But this year, Mentor's HyperLynx PI power integrity tool took home the gold in the System Modeling and Simulation Tool category. Steve Kaufer, director of engineering for HyperLynx products, has more on Mentor's big win.
A Tale of Two Properties
High-speed, high-frequency designs make your materials choice more important than ever. DuPont engineer Glenn Oliver explains how a new Kapton/Teflon composite can benefit those with challenging high-speed dielectric requirements.
Analyzing and Designing Vias for Multi-Gig Interconnects
Vias are a necessary evil in PCBs. They enable transitions for signals between layers. But if not designed correctly, vias can also be the weakest reliability link and the weakest signal integrity link. In this app note, Dr. Yuriy Shlepnev, the Electromagnetics Guru, walks us through a new way of thinking about the electrical performance of vias.
SERDES Modeling Using the AMI Standard
It has been difficult to simulate serial links if the driver and receiver are supplied by different vendors. But the Algorithmic Modeling Interface can solve this problem. This paper shows the use of AMI in modeling the behavior of the data path and adaptive control loops.
Six Questions: David Bergman Discusses China and IPC
PCB Design007 recently expanded into China with a Mandarin edition -- PCB Design007 China. We asked IPC Vice President of International Relations David Bergman a few questions about China, its electronics industry and the role of IPC China.
The European Design Market: Time to Optimize
Dirk Muller is president of the European Cadence rep FlowCAD. During Productronica, Dirk sat down with European Editor Stuart Hayton to discuss Europe's PCB design tool market.
Zuken Signs 3DVision as E3 WireWorks Distributor
Zuken has signed the first U.S. distributor for the new E3.WireWorks product family that integrates with the SolidWorks 3-D CAD environment. 3DVision Technologies, headquartered in Cincinnati, Ohio, was selected for its years of experience working with SolidWorks.
Microvia Reliability Takes Center Stage
With the move to HDI, more and more microvia failures are rearing their ugly heads. Paul Reid of PWB Interconnect Solutions discusses some of the root causes for microvia failures and identifies some solutions.
Maxed Out: Next-Generation Displays (Part 1)
For decades, CRT-based computer monitors were the only game in town. But things don't stay the same forever; new display technologies are emerging all the time, and there are some mega-exciting possibilities for the future, including carbon nanotubes.
New Solder Attach Method Challenges BGA Paradigm
First-time SMTAI paper presenter Adam Stanczak, Global Technolology Manager for Molex, explains how a new solder attach method can help designers move away from traditional BGAs. His paper, aimed largely at PCB designers, explains design hardships and technology verifications for PCB assemblies.
Don DeGroot Discusses Test Methods Group Breakthrough
Don DeGroot, president of CCNi, is chairman of the High-Speed/High-Frequency Test Methods Subcommittee. Don explains how his subcommittee's work supports PCB designers and manufacturers, and the group's recent breakthrough: A test method that may appeal to everyone, from materials suppliers to OEMs.
Engineers Are People Too
Conventional wisdom tells us that engineers are serious, introspective people - nothing like their co-workers in marketing and sales. But as Indium's Rick Short explains, today's engineers have Twitter and Facebook pages, and they'd rather see a multimedia presentation than read a dry data sheet. Anyone working with - or marketing to - engineers should keep in mind that engineers are people too.
Maxed Out: Seeing Sounds and Tasting Colors
Do your eyes associate words or letters with certain colors? If you have a particular kind of synaeshtesia, the answer is yes. And if you're a synaeshtetic electrical engineer, you may perceive different colors when looking at a black-and-white gate-level schematic. How can this be, you ask? Let's dive in and see!
Chapter 1: Timing Analysis and Simulation for SI Engineers
IBM signal integrity engineer Greg Edlund recently authored "Timing Analysis and Simulation for Signal Integrity Engineers." This technical book was published by Prentice Hall as part of its Signal Integrity Library. Prentice Hall was kind enough to let us publish the first chapter.
Circuit Express Sets Bar High With Low Volumes
In these uncertain times, Circuit Express has found the recipe for steady growth: A direct sales force and a sharp focus on quickturns, prototypes and low-volume PCB manufacturing, particularly in the mil/aero segment.
The Future of Multiclock Systems
The clock requirements of high-performance systems vary from the chip to the circuit to the system level, but in every case the ideal is a fully synchronous system. This paper, written by Ransom Stephens of Ransom Notes and Jorge Gomez and Roman Boroditsky of NEL Frequency Controls and presented at DesignCon, introduces a new approach to synchronized clock architecture.
Multi-GB/s Serial Channel Design
As standards push data rates of serial channels into the multi-GB range, an opportunity arises to tune system design procedures to achieve the accuracy demanded by the specs and the success required by timelines. This paper describes how a channel design platform can aid in guiding a project from conception to physical verification.
Teaming Up on Design and Test
No longer isolated disciplines, design and test often work together now. The tools themselves are adapting, with graphical design environments intended for test now aiding the design process, and design, modeling and simulation tools enabling such techniques as hardware-in-the-loop testing.
Isola Solidifies Move into RF, High-Speed Materials
A year ago, Isola introduced a family of laminates for RF/microwave applications. I-Connect007's Ray Rasmussen, Steve Gold and Pete Starkey recently spoke with Isola's David Barrell about the IS680 material system and its benefits for PCB designers and fabricators.
The Universal PCB Design Grid System
The American electronics industry's refusal to use the metric system is hurting us in global markets. The Universal PCB Design Grid System provides a framework for American PCB designers who wish to embrace metrication.
EMI Shielding of Cable Assemblies
Numerous standards document performance requirements for high-speed cable assemblies. However, while signal integrity parameters, such as characteristic impedance, crosstalk, propagation delay and skew are addressed, EMI shielding performance is rarely specified. This paper, written by Dana J. Bergey and Nathan E. Altland of FCI and presented at DesignCon, reports on studies conducted to determine the variability of shielding performance that can be found in commercially available cable assemblies.
Design for Flip Chip and CSP Technology
This paper, written by Vern Solberg of Solberg Technology Consulting and presented at IPC APEX Expo 2009, compares different common technologies including flip-chip, chip-size and wafer level array package methodologies detailed in the new IPC-7094 publication. It considers the effect of bare die or die-size components in an uncased or minimally cased format and reviews PCB design guidelines to ensure efficient assembly processing.
Cable EMI Characterization Using a Reverberation Chamber
The design of data cables to be used in high-performance applications presents a number of challenges. Previous work by these authors has shown the potential impact of differential delay skew in the generation of common-mode noise and EMI. This paper, written by IBM's Joseph C. (Jay) Diepenbrock and Dr. Bruce Archambeault and presented at DesignCon 2008, examines methods for measuring the shielding effectiveness of cables and discusses considerations involved in building and characterizing a reverberation chamber.
New Buds on the PCB Documentation Tree
IPC's Director of Technology Transfer Dieter Bergman looks forward to fresh growth on an already well-established PCB specification, as IPC-2615 prepares to fold into the IPC-2610 documentation family. Dieter spoke with Guest Editor Kelly Dack at IPC APEX EXPO in Las Vegas.
Solutions for Causal Modeling and A Technique for Measuring Causal Broadband Dielectric Properties
This paper, written by Chad Morgan of Tyco Electronics and presented at DesignCon, addresses specific dielectric and conductor material relationships necessary to produce consistently causal and accurate electrical component models. Final model data is provided to verify the accuracy and causality of the measurement method.
Video: Ask For The Order!
If you're a rep, you have to create your own success. With over 10 years of experience selling PCBs, Marissa Oskarsen, CEO of manufacturer's rep E-Tec Sales, says solid PCB partners, lots of self-motivation and asking for the order makes her rep business successful.
Video: How to Compete During a Recession
What do you do in the middle of a recession when you're competing against much larger corporations? How do you change the purchasing habits of contract manufacturers used to doing things the way they always have? CheckSum President John VanNewkirk offers some insights.
Modeling Issues and Possible Solutions in the Design of High-Speed Systems With Signals at 20 Gb/s
In high-speed digital systems with signals at 20 Gb/s, standard approaches used to study signal integrity at PCB and package level are not valid anymore. IBIS models are no longer accurate and H-Spice transient simulations face convergence and stability problems. How to address these problems? This paper, written by Antonio Ciccomancini Scogna of CST of America and Jianmin Zhang, Kelvin Qiu, and Qinghua Bill Chen of Cisco Systems, provides answers by considering a few test cases as well as more complex multilayer PCBs.
PCB Via Analysis With Foldy Lax Equations
Authors Xiaoxiong Gu and Mark B. Ritter of IBM's T. J. Watson Research Center applied Foldy-Lax multiple scattering equations to analyze signal and ground vias in a multilayer PCB. The Foldy-Lax method solves multiple via couplings between two power/ground planes, and takes into account physical dimensions of via structures. Good model-to-hardware correlation is demonstrated up to 40GHz in this paper, presented at DesignCon.
The Impact of Split Planes on Signal and Power Integrity
Trends in increased functionality and decreased form factor lead to splits in the power (and/or ground) planes. This DesignCon 2009 paper, written by Jason R. Miller, Gustavo J. Blando, Roger Dame, Barry A. Williams and Istvan Novak of Sun Microsystems, examines the impact of traces crossing splits and slots on signal integrity and power integrity using both measurements and simulations.
Some Common Sense Design Principles
After managing PCB designers for 20 years, I'd like to offer a few common sense design tips: Attack the most critical routes first, quit holding "beauty contests" for your designs, and realize that when they're done, they're done. By Gary Griffin, president of BTI.
Counterfeit Forum Highlights the Fight Against Fakes
Counterfeit electronics is a trillion-dollar business that affects OEMs and EMS companies around the world. IPC presented a forum on counterfeit electronics during APEX, featuring speakers who are involved in the clash with the counterfeiters: Jim Williams of Polyonics, Brad Botwin of the Office of Technology Evaluation, Gene Panger of TUV Rheinland and Dennis Fritz of SAIC.
Video: The Dovetailing of Engineering and Design
As board speeds increase, PCB designers are learning more and more engineering skills. But, as Rick Hartley explains, some PCB design engineers are also being forced to become more proficient at PCB design.
Video: Joel Peiffer on EP's Long Trip to Mainstream
Embedded passive materials have been available commercially for over a decade. Why has it taken so long for them to gain mainstream acceptance? How do you convince designers to spec them in? 3M Electronic Solutions Advanced Engineering Specialist Joel Peiffer weighs in on these questions.
SSO Noise, Eye Margin and Jitter Characterization
This paper, which won a Best Paper award at DesignCon 2009, describes the power integrity design and characterization for a single-ended I/O interface through noise, eye margin and jitter measurements. Authors are Vishram S. Pandit, Ashish N. Pardiwala, Hsiao-ching Chuang, Myoung Joon Choi and Md. Ruhul Quddus of Intel Corporation.
The Del Mar Electronics Show Wrapup
Attendance was up year-on-year at last week's Del Mar Electronics Show. What is it about this small show in San Diego that draws PCB manufacturers from all over the country?
Video: Dieter Bergman on The New 2610 Series
IPC Director of Technology Transfer Dieter Bergman sat down with Guest Editor Kelly Dack at Designers Day in Las Vegas to discuss the the development of IPC-2610, an electronic documentation family that updates the IPC-D-325 series. The 2610 series is much more comprehensive.
APEX EXPO 2009 Video Showcase
Since New Year's Day, we've traveled around the globe covering electronics design and manufacturing for you. From Silicon Valley to Las Vegas to Shanghai, our Real Time staff hasn't missed a beat. At IPC APEX EXPO 2009 alone, we shot 140 videos of interviews and events. Here, Gary Griffin, president of Board Technology Innovations, discusses the need for common sense in PCB design and engineering. And Vern Solberg of Solberg Technical Consulting discusses his committee's efforts on the new IPC-7093 specification, a document that will define board assembly design features for bottom termination components.
New Serial Link Process, 6 Gbps SAS Study
Over the past decade, PCB signaling has made a steady migration to high-speed serial links. This case study, presented at DesignCon 2009, details a pre-hardware serial link simulation process developed for 6+ Gbps link designs. Techniques for specification compliance testing are illustrated, some of which previously could only be performed with physical hardware. This paper was written by independent signal integrity consultant Donald Telian, Paul Larson and Ravinder Ajmani of Hitachi GST, and Kent Dramstad and Adge Hawes of IBM.
The Successful Design of High-Speed Serial Backplanes
Designers accustomed to creating serial backplanes operating at or above 1 Gb/s face a host of challenges and obstacles that at lower frequencies can be ignored.
APEX EXPO 2009 Video Showcase
If you missed IPC APEX EXPO, don't worry. We interviewed the top PCB designers, engineers and manufacturers, and we'll be bringing these interviews to you in the upcoming weeks. PCB007 Editor Steve Gold chats with Advanced Circuits CEO John Yacoub about his company's plan to "weather the storm" while continuing to invest in new equipment. And Guest Editor Eric Bogatin interviews Rich Mellitz, principal engineer with the Enterprise Server and Platform Division of Intel, and Don DeGroot, president of CCN-I. They discuss the new loss and high-speed test standards introduced at IPC APEX.
Designers Day Video Showcase
At Designers Day in Las Vegas, we interviewed some of the top names in PCB design and design engineering. Lee Ritchey sits down with Guest Editor Kelly Dack to discuss the tradeoffs associated with layer count. And Sunstone Circuits CAD Marketing Manager Nolan Johnson discusses his company's drive for DFP (Design For Profitability) with Kelly and Andy Shaughnessy.
AWR, James Cook U. Team Up For RF/Microwave Design Course
A comprehensive RF and microwave electronic engineering course developed by Associate Professor Keith Kikkert of the James Cook University School of Engineering & Physical Sciences is now available free of charge to universities worldwide.
DesignCon 2009 Video Showcase
In this week's DesignCon Video Showcase, Package Science Services' Thomas Tarter explains his plans to form a non-profit organization that makes software available for unemployed electrical engineers. And Agilent EESofEDA's Colin Warwick discusses his popular Signal Integrity Tips blog, and electrical engineers' need for information at their fingertips.
EMI From SerDes Differential Pairs
Comprehensive EMI layout rules for routing high-speed SerDes differential pairs are quasi-nonexistent. As a result, there is a need to create a new set of layout rules to better control the EMI of interfaces running at GHz frequencies. This paper, authored by Cisco's Philippe Sochoux, Morris Hsu, Alpesh U. Bhobe and Jinghan Yu and presented at DesignCon 2009, investigates the EMI caused by various layout imperfections.
DesignCon 2009 Video Showcase
At DesignCon 2009, we were fortunate enough to speak with some of the top movers and shakers in PCB design engineering. In this week's DesignCon Video Showcase, Brad Griffin, product marketing manager for Cadence's Allegro line, discusses the high-speed issues affecting PCB and IC designers, and the difficulty PCB design teams face in scheduling time for signal integrity analysis. And Sonnet Applications Specialist Robert O'Rourke and Guest Editor Dr. Eric Bogatin dig deeper into the mysteries of electromagnetic simulation, ground bounce and crosstalk.
Thou Shalt Document!
Have you ever wondered how to get involved in IPC standards development? If so, I'm going to give you an opportunity to participate right here, right now! The IPC is currently in the process of updating IPC-D-325 Documentation Requirements into the new IPC-2610 series. Join me in a little experiment!
DesignCon 2009 Video Showcase
At DesignCon 2009, we were fortunate enough to speak with some of the top movers and shakers in PCB design engineering. In this week's DesignCon Video Showcase, Mentor Graphics' David Kohlmeier reviews the current development of high-speed PCB design tools, and what EDA companies are doing to differentiate themselves. And Fidus Systems' Syed Bokhari and Donald Moncion explain how they move SI analysis up early in the design process, and why their motto is "We get it right the first time."
Altium Challenges Engineers to Change the Way Design is Done
Altium will ask electronics designers to leave all preconceptions at the door at this year's Embedded World conference, held in Nuremberg, Germany, March 3-5, 2009.
DesignCon 2009 Video Showcase
At DesignCon 2009, we were fortunate enough to speak with some of the top movers and shakers in PCB design engineering. In this week's DesignCon Video Showcase, Guest Editor Eric Bogatin and Cosmin Iorga of Noisecoupling.com discuss various methods for managing, simulating and suppressing noise coupling at the IC, PCB and system level. And Publisher Steve Gold chats with IBM's Bruce Archambeault about the effects of the slowing economy on R&D and engineering: You guessed it - even more pressure to get it right the first time.
Improving DFM by Resolving Component Polarity Problems
Jack's back, and he's written a primer for circuit board designers and anyone affected by the work designers produce. Circuit board designer Jack Olson of Caterpillar describes the process for translating component placement information from the CAD software to the component pick-and-place machine and to suggest ways in which the process might be improved.
Thermal Challenges in 3D IC Integration
Stacking chips brings performance and design advantages, but also heat challenges. Stacking saves real estate while improving other processes, but the increased density also causes increased heat.
DesignCon 2009 Video Showcase
At DesignCon 2009, we interviewed some of the top engineering minds in the industry. In this edition of the DesignCon Video Showcase, Apache Design Solutions CEO Andrew Yang details his company's movement from SoC into the PCB and packaging engineering tools space, as well as his vision for developing the best analysis tools. And Valor Computerized Systems EDA Library Products Manager Tom Hausherr (founder of PCB Matrix, recently acquired by Valor) talks with Guest Editor Kelly Dack about BGA routing strategies, including the ultimate via solution for fanning out a 1 mm pitch BGA. Tom also discusses the DesignVision Award that PCB Matrix won for its Symbol Wizard tool at DesignCon.
Impact of PCB Laminate Parameters on Suppressing Modal Resonances
Power planes are capacitive at low frequencies, and develop resonances according to their cavity dimensions. By reducing the plane thickness, the downward impedance slope is pushed to lower values and at the same time the modal resonances get gradually suppressed. The Q of these resonances is related to the effective loss of the composite material of dielectric and metallization. This paper, written by Sun's Istvan Novak, Jason R. Miller, Gustavo Blando and Barry Williams and presented at DesignCon 2008, shows how the total area, aspect ratio and laminate thickness impact the high-frequency impedance profile.
Noise Injection for Analysis and Debugging
Troubleshooting PCB and system designs, especially for intermittent errors, can be time-consuming, and predicting field problems can be even more difficult. In a paper presented at DesignCon 2009, Doug Smith describes a method for detecting such problems: Inductively injecting controlled voltage pulses into an individual PCB path or a system component.
DesignCon 2009 Video Showcase
At DesignCon 2009, I interviewed some of the top engineering minds in the industry. In this edition of the DesignCon Video Showcase, Bruce Archambeault, an EMC instructor and distinguished engineer with IBM, discusses why - when it comes to splitting planes - you should never say never, and never say always. And Todd Westerhoff, VP of software products for SiSoft, explains how his company has managed to win several DesignVision Awards at DesignCon, and why some EDA tool vendors don't seem to use their own tools.
Multi-Level Signaling in High-Density, High-Speed Electrical Links
This paper, presented at DesignCon 2008, provides an analysis comparing multi-level signaling to standard NRZ signaling for module-to-module on-board electrical interconnects. To study on-board electrical performance, duo-binary and PAM4 I/O models were created and compared to NRZ signaling in behavioral link-level simulations. Simulation results show that NRZ signaling with FFE and DFE equalization offers the best electrical performance.
Performance Limitations of Backplane Links at 6 Gbps and Above
As data rates exceed 6 gigabits per second, the size of physical structures within backplane interconnects becomes significant. This paper, authored by Jason Chan, Brian Kirk and Jose Paniagua of Amphenol TCS and presented at DesignCon 2008, focuses on major performance limitations seen across numerous backplane designs and proposes methods to improve their performance.
Aggregation of Crosstalk in Backplanes
As serial data rate increases in backplane interconnect, dielectric and skin loss, reflections due to vias and connectors and crosstalk become major obstacles. This paper, authored by Atul K. Gupta of InspireSys Corporation and Henry Wong of Gennum Corporation, and presented at DesignCon 2008, provides insight into the crosstalk utilizing time domain analysis.
The Convergence of RF and PCB Design
The worlds of PCB and RF design have converged, and there is no turning back. But despite a few inroads here and there, this convergence has occurred largely without the two worlds really figuring out how to work together. Mike Heimlich of AWR Corporation explains why the two sides are being forced to cooperate.
DfR Mistakes Made by System Designers
System designers are constantly expected to do more with less. In this rush to meet customer requirements, common and costly hardware design mistakes are often made. In this presentation with voiceover from the EKTN "Bending the Design Rules" conference, CEO Craig Hillman of DfR Solutions presents case studies of some common design mistakes, as well as a checklist to avoid these mistakes.
Heat Dissipation in Design: Current and Future Challenges
Dissipation of heat is a major packaging task. This voiceover presentation by Dr. Thomas Ahrens of the Fraunhofer Institute explains how to tailor components, modules and PCB elements for heat buffering, spreading, transfer and conduction. This presentation was given at EKTN's "Bending the Design Rules" conference in the UK.
The Shaughnessy Report: The Year in Review
The economy slowed, but technological innovation didn't. In 2008 we saw a plethora of new PCB design and design engineering tools enter the market, and plenty of great ideas as well. Take a look back at a year full of surprises.
Crosstalk Measurement, Extraction and Validation in 10 Gbps Serial Systems
Because crosstalk jitter is uncorrelated from the link data pattern, it is hard to remove through equalization techniques. This paper provides a process for extracting accurate coupled models from connectors. Authored by Dave Dunham of Molex, Gourgen Oganessyan of Quellan, and Pravin Patel, Rubina Ahmed and Moises Cases of IBM, it was presented at DesignCon 2008.
Gene Weiner's HKPCA Presentation: 50 Years of Fab
IPC Hall of Fame recipient Gene Weiner was invited by HKPCA to present a retrospective of the past 50 years in PCB manufacturing. Watch this entertaining and informative HKPCA presentation in its entirety.
Challenges and Solutions for Removing Fixture Effects in Multi-Port Measurements
As data rates continue to rise in digital networks, removing fixture effects becomes increasingly important. This paper, written by Robert Schaefer of Agilent and presented at DesignCon 2008, discusses several calibration and measurement techniques needed for removing fixture effects, using a backplane as the DUT.
The Shaughnessy Report: Craig Hillman on Avoiding PCB Design Failures
Today, designing a reliable PCB is tougher than ever. But Dr. Craig Hillman, CEO of DfR Solutions, is taking designing for reliability to a new level. Craig discusses common PCB design failures and ways to avoid them, as well as the physics of failure.
A Design of Experiments for Gigabit Serial Backplane Channels
Today's backplane environment presents challenges for high-speed digital designers. This paper discusses an in-depth design of experiments using combinations of three high-speed connectors, three dielectric materials and three channel lengths. Written by Mike Resso of Agilent Technologies, Jack Carrel of Xilinx and Bill Dempsey of Redwire Enterprises, this paper was presented at DesignCon 2009.
High-Speed Serial Interconnect Imbalance
Many signal integrity experts and standards organizations focus on skew to improve signaling margins and reduce electromagnetic emissions in differential signaling applications. While skew analysis is an accepted metric of imbalance, it is also an incomplete one. This DesignCon technical paper, written by senior engineers Shafiq Rahman and Barry Olawsky of Hewlett-Packard, presents more comprehensive methods of characterizing interconnect imbalance.
Asia Seeks Improved Yields, Not Just Increased Capacity
For years, increasing capacity has been the modus operandi in China and other low-cost Asian nations. According to Orbotech Asia Pacific President Richard Klapholz, the days of unfettered capacity expansion are over. Now fabricators and assemblers are looking for ways to bolster the bottom line with improved yields as they grapple with a brave new world of shrinking profit margins and increased raw materials costs.
Data Mining 12-Port S-Parameters
The 12-port differential S-parameters contain the behavior of up to three independent differential channels in a high-speed serial interconnect. When including magnitude and phase information, single-ended and differential forms, and the frequency and time domain descriptions, more than 400 different elements must be taken into account. This paper was written by Eric Bogatin of Bogatin Enterprises and Mike Resso of Agilent and presented at DesignCon 2009.
Loaded Parallel Stub Common-Mode Filter
EMI radiation problems are usually due to certain unwanted common-mode signals. This paper presents a novel structure, applicable to PCBs or backplanes, that can be used to filter selected frequencies of the common mode present on high-speed differential signals. This paper was authored by Predrag Acimovic, a technical advisor in PMC-Sierra's Mixed-Signal Design Group, and presented at DesignCon 2008.
Gene Weiner on 'Navigating the Solar Maze'
PCB fabricatiors and assemblers, and their respective suppliers, are investigating opportunities in the solar market. Quantum Solar Group Founding Partner Gene Weiner, an IPC Hall of Fame recipient, discusses some early findings in his group's upcoming solar study entitled "Navigating the Solar Maze."
Heat Sink Design Flow for EMC
Current EMC design for heat sinks is reactive rather than proactive, with the EMC team only becoming involved when there is a resonance problem in testing. This paper, presented at DesignCon 2008, develop a methodology including pre-design guidelines, post-design simulation and correlation with lab measurements.
Mode Conversion and EMI Performance of Shielded Cable Assemblies for 10 Gbps Data Transmission
Differential crosstalk in high-density connectors, footprints, and packages is typically 1/3 or lower than single-ended crosstalk due to field cancellation. This paper, written by Jim Nadolny, Julian Ferry and Cesar Arroyo of Samtec and presented at DesignCon 2008, looks at measured results showing the reduction in emissions due to differential signaling in shielded cable assemblies.
DownStream Announces BluePrint-4-PADS
Exclusive configuration of BluePrint-PCB documentation tool for Mentor PADS layout users offered at special introductory price. BluePrint-4-PADS lets PADS Layout users automate the creation of the documentation that drives the PCB fabrication, assembly and inspection processes.
CST Announces STUDIO SUITE Version 2009
Computer Simulation Technology (CST) announced the release of Version 2009 of the electromagnetic simulation software CST STUDIO SUITE, including its flagship product CST MICROWAVE STUDIO.
Happy Holden Talks HDI for Aerospace Applications
PCB design, fabrication and assembly for HDI is often equated with consumer products like cell phones and notebook computers. But Mentor Graphics Senior Technologist and HDI Handbook Editor Happy Holden is now working on using HDI technology for aerospace and large form-factor applications.
Analysis of Crosstalk Effects in Transceivers
Crosstalk does not fit neatly into the standard definitions of jitter components, so most jitter analyzers misinterpret crosstalk. In a paper presented at DesignCon 2008, Dr. Daniel Chow of Altera explores the effects of crosstalk aggressors on a victim signal in a transceiver, with particular emphasis on jitter.
Agilent's EMPro 3D Reduces Design Time
EMPro is a new design platform for analyzing the electromagnetic (EM) effects of RF and microwave components such as high-speed IC packages, on-chip embedded passives and PCB interconnects.
Optimum Design Acquires RockSolid Design
Optimum Design Associates, a leading provider of PCB design services for the Mentor's Expedition platform, has acquired RockSolid Design, a major Cadence Allegro design bureau. The move makes Optimum one of the largest PCB design layout service providers in the country.
Designers Council Seeks High-Speed Certification Input
The IPC Designers Council Education Committee has authorized development of the High-Speed - High-Frequency Focus Module for Certification, and the DC needs your help preparing the 32-topic syllabus to be used for review.
IEEE Council on EDA Hosts Opening ICCAD Reception
The IEEE Council on Electronic Design Automation (CEDA) will host the opening reception of this year's International Conference on Computer-Aided Design (ICCAD) Sunday, November 9, 2008 at 5:30 p.m. in the Doubletree Hotel's Sierra Ballroom in San Jose, California.
Ron Lasky: Does RoHS Really Help Anybody?
Apparently RoHS does have some benefits. While most industry insiders believe RoHS has had more detrimental than positive effects, Dr. Ron Lasky of Indium discusses some of the benefits lead-free soldering has produced.
Exploration of Deterministic Jitter Distributions
Deterministic jitter is generally agreed to be peak limited, but it is less clear how rapidly its probability density function decreases near that limit, especially when jitter is due to crosstalk. This paper, written by Michael Steinberger of Sisoft, was presented at DesignCon 2008.
EMA's TimingDesigner 9.1 Focuses on Altera's FPGA Flow
EMA Design Automation announced TimingDesigner version 9.1, adding support for the SDC timing format that allows interface with FPGA and ASIC design flows.
The New Electronics Paradigm
Printed electronics is enabling printed displays, solar cells, functional circuits, batteries, sensors and even sound devices in a form that can be flexible, stretchable, foldable and cheap enough to be disposable on promotions and packages.
FUJIFILM Dimatix Picks Numerical Innovations for CAD Translations
Numerical Innovations LLC will provide FUJIFILM Dimatix with an OEM version of its ACE (Advanced CAD Exchange) Translator. ACE bi-directionally translates a wide variety formats including DXF, GDS-II, OASIS, Gerber (RS-274X/Fire9000), ODB++ and IGES.
Cadence CEO Mike Fister Resigns
Mike Fister has resigned from Cadence Design Systems, along with a number of other executives. Cadence has created an Interim Office of the Chief Executive while the search continues for a new chief executive.
The Shaughnessy Report: Designers Day - California to Focus on Technology
Jean Hebeisen and Tina Nerad of the IPC Designers Council provide an update on the first Designers Day - California, coming up on October 22 in Irvine, California. Plus, what's new at the Designers Council.
PCI Express Timing Margins
This case study takes two PCI Express interfaces through a detailed exercise of quantifying individual contributors to operating margin erosion using the metrics of jitter, S-parameters and time-domain reflectometry. This paper, written by Senior Engineer Greg Edlund of IBM, was presented at DesignCon 2008.
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