Designers Notebook: Flexible Circuits for In-line SMT Assembly Processing

Incorporating surface mount components directly onto a flexible circuit’s etched copper land patterns is not unlike the assembly process used for rigid circuit boards. To maximize robotic assembly efficiency and increase throughput of the flexible circuit, however, the circuit design engineer will need to provide a format that includes all features required for in-line assembly processing. There are three primary process stages for surface mount assembly: solder paste deposition, component placement, and reflow-solder processing. To maximize manufacturing efficiency, automated systems developed for performing these functions are each designed to accommodate the in-line conveyor transfer between one system to another (Figure 1).

Vern_Dec22_Fig1_cap.jpg

Conveyor systems, although adjustable, rely on at least two parallel edges to support and transport the circuit from one machine to another. While rigid circuit boards are easily configured for conveyor processing, handling flexible material in a production environment will require a provision for the support of the thin, film-based circuit throughout each stage of the assembly process. For the low- and medium-assembly volume applications, a conveyor-compliant pallet fixture can be prepared to retain the individual flexible circuits during each stage of the assembly; however, products requiring high-volume assembly processing require a more efficient solution.

To better accommodate conveyor handling, flexible circuits can be furnished from the circuit fabricator with a temporary, rigid carrier panel backing. Figure 2 exhibits a single flexible circuit assembly with a rather complex outline. Without the benefit of the rigid backing material and a dedicated, product-defined carrier pallet fixture, precise solder paste deposition and accurate component placement would not be possible.

Vern_Dec22_Fig2_cap.jpg

Fabrication companies have developed a broad range of solutions for panel layout to both encourage efficient handling and support large and small form factor circuits through the assembly process:

  • Single unit format (medium and large circuits)
  • Multiple unit array format (row and column layout)
  • Nested array format (maximizing area utilization)

When processing the smaller form factor flexible circuits, the multiple unit array format has proved both efficient and economical.

Palletizing the Flexible Circuit
The carrier panel developed for flexible circuit applications is designed to provide the uniform, rigid-board outline needed for conveyor transfer and to physically support the flexible circuit through each assembly process sequence. To keep the single- and multiple-unit flexible circuits in place, the designer will need to provide small tab-like connecting features. To provide an area for the adhesion of the flexible material to the carrier panel, the flexible base material is simply extended outward to match the carrier panel outline. The adhesive film joining the flexible material to the rigid carrier panel must remain clear of the flexible circuit outline.

The palletized, multi-unit example shown in Figure 3 represents a grouping designed to maximize material utilization for small, irregularly shaped flexible circuit units. This example represents flexible circuit units that are arranged in the opposing orientation or “nested” array format.

Vern_Dec22_Fig3_cap.jpg

Key Features Required for Automated Assembly
The supporting panel must include several key attributes:

  1. Edge clearance of the carrier panel must allow for unobstructed access to the conveyor support belt.
  2. Two or more tooling holes are required, located outside the flexible circuit units to secure the panel during the post assembly separation procedure.
  3. An equal number of “global fiducial targets” need to be located near the panel edge area to assist panel alignment during the solder deposition process. Solder deposition systems use cameras to pinpoint the fiducial targets, enabling precise alignment of the solder stencil to the land pattern features on the individual circuit units within the panel’s central area.

In addition to the globally located fiducial features, two or more fiducials will be required within the component mounting zone to facilitate precise automated component placement. Using multiple fiducial datum features within the SMT component placement area will minimize the effects of variable shrinkage or any process distortion in the flexible materials.

Vern_Dec22_Fig4_cap.jpg

The illustration in Figure 4 is an example of a flexible circuit with SMT components mounted within two zones that are separated by a narrow interconnect section. Multiple fiducial locations will provide a tighter tolerance within each datum zone or termination area while relaxing the need to maintain a constricted tolerance of the flexible interface section between other component termination areas.

Fiducial Target Design Specification
The optimum fiducial target is simply a solid fetched copper circle that is clear of surface coating or cover layer material. Coatings and cover layer film material openings surrounding the fiducial must be adjusted to provide enough clearance around the fiducial’s perimeter to ensure that it does not overlap onto the fiducial target features during the cover layer-to-base circuit lamination process.

  • The optimum fiducial is a solid circular land pattern that is 0.25 to 0.50 mm (~0.010" to 0.020") in diameter.
  • To enable visual access for locating the fiducial targets, the solder mask or cover coat must provide a clearance 2 x R of fiducial R.
  • Fiducial location must be clear of the panel or circuit outline edge by a minimum of 4.75 mm (~0.187") and provide a consistent high contrast.

No plating is required on the etched copper fiducial surface, but if a secondary alloy plating over the base copper is specified in the control document, the designer must ensure that flatness of the fiducial surface is maintained within 0.015 mm (0.006").

Final Comments
When planning multiple unit circuits for panel processing, the flexible circuit designer should attempt to coordinate the final panel size and unit configuration between both those responsible for the assembly process and the fabricator designated for manufacturing the circuit.

Technical Course
Vern Solberg will be presenting a half-day technical course, “Flexible and Rigid-flex Circuit Design for Manufacturing,” on Sunday, Jan. 22, at IPC APEX EXPO 2023. The course will focus on SMT design, fabrication, and assembly process principles.

This column originally appeared in the December 2022 issue of Design007 Magazine.

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2023

Designers Notebook: Flexible Circuits for In-line SMT Assembly Processing

01-20-2023

Incorporating surface mount components directly onto a flexible circuit’s etched copper land patterns is not unlike the assembly process used for rigid circuit boards. To maximize robotic assembly efficiency and increase throughput of the flexible circuit, however, the circuit design engineer will need to provide a format that includes all features required for in-line assembly processing.

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2022

Designers Notebook: Ultra High-Density Circuit Board Design

11-03-2022

To facilitate new generations of high I/O semiconductor packaging, circuit board technology is undergoing significant refinement in both fabrication process methods and base materials selected. Many of the new high-function semiconductor package families require significantly more terminals than their predecessors. Interconnecting these very fine-pitch, high I/O semiconductors can dramatically affect the procedures used in both circuit board design and assembly processing.

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Designers Notebook: Design for Test, Part 3

05-04-2022

The general trend in electronics is to improve performance and minimize product size, often leading to more complex printed circuit board and higher component density. Semiconductor packaging in particular, have become more complex, many having multiple functions interconnected within the package or onto the silicon itself. For products with very high component density companies soon realize that 100% test-probe access may not be possible.

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Designers Notebook: Design for Test, Part 2

03-08-2022

Current generations for PCB designs have increased in complexity. The product developer and assembly service provider, whether in-house or outsourced, must consider manufacturing efficiency, throughput, and process yield. While design for manufacturing is an absolute necessity for controlling manufacturing costs, design to accommodate product testing does need attention as well. The primary concern is to ensure that the end product will perform reliably without compromise.

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Designers Notebook: A Lesson on Automated Optical Shaping

03-07-2022

IPC APEX EXPO show and conference was safely back in full swing after skipping 2021. Because my primary interest is printed circuit board and assembly processing, I ventured onto the show floor to review some of systems exhibited that have evolved that may contribute to process efficiency and end product quality. A key benefit of attending a show like this one is that the board and assembly manufactures can view and compare similar product offerings in one place.

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Designer's Notebook: Design for Test, Part 1

02-03-2022

Circuit board fabricators remind us that multilayer boards will predictably have more components necessitating greater circuit routing complexities than that experienced on earlier applications. Also, with each generation of semiconductors it seems that the terminal count increases and the spacing between terminals shrinks, requiring designers to employ conductor lines and spaces that are far narrower than previously considered the norm.

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2021

Designers Notebook: Embedding Resistor Elements—Part 2

06-15-2021

As an alternative to the thick-film resistor process detailed in Part 1, a significant number of PCB fabricators are offering embedded thin-film resistor capability. Read Part 2 here.

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Designers Notebook: The 'New and Growing' Embedded Resistors

04-19-2021

Why is embedded resistor technology considered to be “new” and “growing” despite decades of history? In fact, a broad number of established PCB fabricators are knowledgeable about the materials and processes for embedding resistor elements but not all may be prepared to alter procedures established for their more conventional multilayer circuit board customer base.

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Designers Notebook: Developing Panel Level Semiconductor Packaging

02-22-2021

While semiconductor packaging has traditionally utilized a narrow strip of organic copper-clad organic-based laminate and wire-bond processing for the single-die BGA. Companies furnishing devices for high-volume markets are now implementing very fine-pitch alloy bumped flip-chip package technologies that enable face-down interface.

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2020

Designers Notebook: Panel-level Semiconductor Package Design Challenges

05-15-2020

Semiconductor package specialists continually work to improve high-volume manufacturing process efficiencies while reducing manufacturing costs. A majority of the commercial semiconductors are built-up on the surface of a circular-shaped silicon wafer with metalized terminal features at their perimeter to accommodate wire-bond interface with a lead-frame or package substrate. Vern Solberg explains.

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Designers Notebook: Design Challenges for Developing High-density 2.5D Interposers, Part 2

01-29-2020

In Part 2 of his column series on design challenges for high-density 2.5D interposers, Vern Solberg discusses primary base materials for 2.5D interposer applications, design guidelines, technical challenges, and key planning issues.

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Designers Notebook: PCB Design and HD Semiconductor Packaging

01-15-2020

To better meet their performance and miniaturization goals, manufacturers are looking for higher functionality for their semiconductor packages. For that reason, many manufacturers will rely heavily on more innovative IC package solutions, often integrating a number of already proven functional elements within a single-package outline. Vern Solberg covers how this and more impact PCB design and HD semiconductor packaging.

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2019

Designers Notebook: Focus of Interest at SMTAI 2019—Low-temperature Solder

10-03-2019

Both suppliers and users of solder materials participated in discussions at SMTAI 2019 related to low-temperature solder (LTS). The solder supply companies present had a wide range of material compositions that employed elements of bismuth or indium to reduce the liquidus temperature of the alloy during the joining process. Key issues that user companies are concerned with are the lower-temperature alloys selected must be reliable and exhibit shear strength, creep resistance, and resistance to thermal fatigue for the duration of the product’s life cycle.

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Designers Notebook: Embedding Components, Part 7—Semiconductor Placement and Termination Methodologies

03-11-2019

Progress in developing high-density embedded-component substrate capability has accelerated through the cooperation and joint development programs between many government and industry organizations and technical universities. In addition to these joint development programs, several independent laboratories and package assembly service providers have developed a number of proprietary processes for embedding the uncased semiconductor elements.

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Embedding Components, Part 6: Preparation for Active Semiconductor Elements

01-10-2019

Designers are well aware that a shorter circuit path between the individual die elements, the greater the signal transmission speed, which significantly reduces inductance. By embedding the semiconductors on an inner layer directly in line with related semiconductor packages mounted on the outer surface, the conductor interface distance between die elements will be minimized.

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2018

Embedding Components, Part 5: Alternative Termination Methodologies and Surface Plating Variations

12-19-2018

Because they are furnished with a very thin profile, resistor and capacitor components with different values can be mounted directly onto land patterns on a subsurface layer of the printed circuit structure. However, handling and placing of these small components requires systems with a high level of positional accuracy. Interconnection can be accomplished using either deposited solder paste and reflow processing or applying a conductive polymer material. Due to the extremely small land pattern geometries required for mounting the miniature passive components, companies commonly rely on precision dispensing these materials.

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Embedding Components, Part 4: Passive Component Selection and Land Pattern Development

11-29-2018

As noted in Part 3 of this series, a broad range of discrete passive component elements are candidates for embedding, but the decision to embed these component elements within the multilayer circuit structure must be made early in the design process. While many of these components are easy candidates for integrating into the substrate, others may not be suitable, or they are difficult to rationalize because they involve more complex process methodology.

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Embedding Components, Part 3: Implementing Discrete Passive Devices

11-15-2018

Most of the passive components used in electronics are discrete surface mount components configured to mount onto land patterns furnished on the surface of a PC board. Designers have several choices for providing passive functions in a system design, such as discrete surface-mounted passives, array passives or passive networks, integrated (Rs and Cs) passive devices, and embedded discrete passive components.

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Designers Notebook: Strategies for High-Density PCBs

01-01-2018

As hand-held and portable electronic products and their circuit boards continue to shrink in size, the designer is faced with solving the physical differences between traditional printed board fabrication and what’s commonly referred to as HDI processing. The primary driver for HDI is the increased complexity of the more advanced semiconductor package technology. These differences can be greater than one order of magnitude in interconnection density.

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2017

Strategies for High-Density PCBs

11-27-2017

As hand-held and portable electronic products and their circuit boards continue to shrink in size, the designer is faced with solving the physical differences between traditional printed board fabrication and what’s commonly referred to as high-density interconnect (HDI) processing.

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Embedding Components, Part 2

07-30-2017

Technology and processes for embedding capacitor and inductor elements rely on several unique methodologies. Regarding providing capacitor functions, IPC-4821 defines two methodologies for forming capacitor elements within the PCB structure: laminate-based (copper-dielectric-copper) or planar process and non-laminate process using deposited dielectric materials.

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Embedding Components, Part 1

06-30-2017

The printed circuit has traditionally served as the platform for mounting and interconnecting active and passive components on the outer surfaces. Companies attempting to improve functionality and minimize space are now considering embedding a broad range of these components within the circuit structure. Both uncased active and passive component elements are candidates for embedding but the decision to embed components within the multilayer circuit structure must be made early in the design process.

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2016

Specifying Lead-Free Compatible Surface Finish and Coating for Solderability and Surface Protection

07-06-2016

A majority of the components furnished for electronic assembly are designed for solder attachment to metalized land patterns specifically designed for each device type. Providing a solder process-compatible surface finish on these land patterns is vital...

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Flexible and Rigid-Flex Circuit Design Principles, Part 6

05-26-2016

The designer is generally under pressure to release the documentation and get the flexible circuit into production. There is, however, a great deal at risk. Setting up for medium-to-high volume manufacturing requires significant physical and monetary resources. To avoid potential heat from management, the designer must insist on prototyping the product and a thorough design review prior to release.

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Flexible and Rigid-Flex Circuit Design Principles, Part 5

04-27-2016

The outline profile of the flexible circuit is seldom uniform. One of the primary advantages of the flexible design is that the outline can be sculpted to fit into very oblique shapes. In this column, Vern Solberg focuses on outline planning, physical reinforcement, and accommodating bends and folds in flexible and rigid-flex circuits.

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Flexible and Rigid-Flex Circuit Design Principles, Part 4

03-30-2016

All of the design rules for the glass reinforced-portion of the board (land pattern geometry for mounting surface mount devices, solder mask and the like) are now well-established. One unique facet of fabricating the rigid-flex product is how the flexible portion of the circuit is incorporated with the rigid portion of the circuit. As a general rule for multilayer PCB design, furnish a balanced structure by building up the circuit layers in pairs (4, 6, 8 and so on).

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Flexible and Rigid-Flex Circuit Design Principles, Part 3

03-02-2016

This column focuses on methods for specifying base materials, and also address copper foil variations and fabrication documentation. It is important to research the various products in order to choose the one that best meets the design requirements.

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Flex and Rigid-Flex Circuit Design Principles, Part 2

02-19-2016

Flexible circuits are commonly developed to replace ordinary printed circuit board assemblies that rely on connectors and hardwire for interconnect.

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Flex and Rigid-Flex Circuit Design Principles, Part 1

01-27-2016

Flexible circuits represent an advanced approach to total electronics packaging, typically occupying a niche that replaces ordinary printed circuit board assemblies and the hard-wire interface needed to join assemblies.

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2005

PCB Designers Notebook: Flexible Circuit Design

01-03-2005

The flexible circuit was originally used as a conductive element for interfacing signals from one electronics assembly to another.

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