The Pulse: Don’t Ignore DC Trace Resistance

As I write this column, I just completed revising and updating one of Polar’s oldest documents on impedance controlled PCBs: "An Introduction to the Design and Manufacture of Impedance Controlled PCBs with Insights into Insertion Loss." While preparing to update it, I noticed the date on the last revision was 20 years ago, in 2000.

Time flies! But the laws of physics don’t. What struck me as I updated the document was how the core principles are the same, but as geometries shrink and speeds increase, the signal comes under the influence of different physical characteristics of both the copper and the laminate. This column will focus on how important it is becoming to take DC trace resistance into account when measuring and specifying thin copper traces.

A good understanding of this topic will lead to fewer spins and also reduce the risk of going down blind alleys when searching for correlation. I have noted in previous columns how, sometimes, fabricators attempt to correlate impedance before removing the effects of DC resistance from their measurements. This can lead to erroneous conclusions about the dielectric constant (Dk) if the Dk value is set by goal-seeking to make a high reading trace correlate.

All this reminds me of a conversation at IBM in France many years ago, where the engineer in charge of signal integrity joked that many SI software packages were "Logieciels comme une usine de Gaz,” which literally translates to, "Software like a gas refinery.” Lots of gauges and levers and pipes—and intimate knowledge of the software—is needed to get a sensible result. Fortunately, the software has become simpler to use over the years, but it remains important to remember to feed the software with good input data in order to get a sensible output.

PCB impedance control is a routine specification on many boards. As geometries shrink, fabricators making TDR impedance measurements will start to see the TDR trace rising over its length. Most of the reason for this is the DC resistance of the trace. (Note that TDR traces may rise for two primary reasons: There is DC resistance in the trace, or the impedance is actually rising because the trace is tapering.)

This DC resistance effect on the trace should not be confused with the characteristic impedance of the trace itself, which is unchanging with length. Designers should ask their PCB fabricator to use a measurement technique that de-embeds (or removes) the DC resistance from the TDR measurement.

A widely accepted technique—adopted by IPC—is launch point extrapolation (LPE). This fits a line to the TDR trace and projects it back to the start of the test coupon—the launch point—where the probe and test coupon connect (Figure 1).

C_Gaudion_Dec20_Fig1.jpg
Why not just test at the launch point? TDR testers used for impedance measurement look at the ratio of voltage reflected from the test trace in comparison with a calibrated 50-ohm transmission line standard. At the launch point, the reflection is masked by signal aberrations caused by the interconnect itself. For this reason, test systems make the measurement further down the line over a stable section to minimize the errors introduced by aberrations at the launch.

With line widths of four mils and above, the DC resistance in the trace is so small that the trace remains flat. As traces get progressively narrower (and with thin copper), the trace will show more and more slope, introducing an error into the characteristic impedance measurement. LPE is a proven technique to remove this artifact.

Why is the DC resistance ignored? It should not be ignored, but it is a different specification from the characteristic impedance, and the two should not be lumped together. To think of this in another way, imagine a reel of coaxial cable of 50- or 75-ohm characteristic impedance with a DC resistance of one ohm per meter. Would you say the 50-ohm cable was 60 ohms if you used 10 meters? No! the cable has a 50-ohm characteristic impedance, and the resistance per meter is a separate specification.

The same is true for PCB traces. Some PCB fabricators misunderstand this and lump the two specifications together and then try to goal-seek the Dk in a field solver to achieve a correlation between measured and modeled values. This can lead to some very odd results. If the traces are very narrow, solving for Dk without removing the DC resistance can lead to “that breaks the laws of physics” results where the “solved" Dk is less than that of the resin alone.

Thus, when PCB traces are narrow (approximately sub-60 microns or with very thin foils), it is imperative that a designer mandates that the PCB fabricator should use LPE or any other valid technique to remove the DC resistance artifact from the measurement before any goal-seeking of Dk takes place. Track resistance calculators are useful for gauging how many ohms per unit length should be present.

As a designer, you need to ensure that your fabricator understands the need to remove the DC resistance on fine line traces. If you have a trace designed where the resistance is 0.25 ohms per inch or more, you should specify that the impedance should be measured on a TDR using the LPE method.

To verify which is the case, simply test by launching from opposite ends. A varying impedance will rise from one end and fall from the other, and a resistive trace will show a rising trace regardless of which end the measurement is taken.

In conclusion, even though we are fortunate now that all SI software is not like the aforementioned IBM France engineer’s amusing description of "Logieciels comme une usine de Gaz," even with today’s simpler user interfaces, software modeling tools are only as good as the raw data you feed into them.

This column originally appeared in the December 2020 issue of Design007 Magazine.

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2020

The Pulse: Don’t Ignore DC Trace Resistance

12-16-2020

Time flies! But the laws of physics don’t. Martyn Gaudion focuses on how important it is becoming to take DC trace resistance into account when measuring and specifying thin copper traces.

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The Pulse: Application Notes—Advice for Authors

07-27-2020

Application notes are the key to shedding light on new topics or new products and software tools in an easily digestible form. As both a consumer and an author many application notes, Martyn Gaudion explores various types and how to approach them.

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The Pulse: Communicating Materials From Design to PCB Fabrication

05-12-2020

Designer and fabricator communication—especially for high-speed PCBs—should be a bidirectional “thing.” It is so easy for a designer to say, “Just build this,” and hand over a challenging design to a fabricator who could have performed better with some preliminary conversation or dialog before placing the order. Martyn Gaudion explores communicating materials from PCB design to fabrication.

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2019

The Pulse: Modelled, Measured, Mindful—Closing the SI Loop

07-18-2019

In this woolly world where high-speed signals enter a transmission line with a well-defined shape and emerge at the receiving end eroded and distorted—and at the limits of interpretation by the receiver—it is well worth running simulation to look at the various levers that can be figuratively pulled to help the pulse arrive in a reasonable shape. At speeds up to 2 or 3 GHz, it usually suffices to ensure the transmission line impedance matches the driver and receiver. And a field solver makes light work of the calculation. But push the frequency higher, and other factors come into play.

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2018

The Pulse: The Rough Road to Revelation

03-07-2018

Several years ago, an unsuspecting French yachtsman moored his yacht to the railings of the local harbour. For a very nervous full tide cycle, he awaited to see if the cleats would pull out of the glass fiber hull. Fortunately, the glass held. A yachtsman at high tide isn’t too worried about whether the seabed is rough or smooth, but at low tide, the concern about a sandy or rocky seabed is altogether different. With PCBs, the move to low-loss laminates exposes a similar situation.

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2017

The Pulse: Tangential Thoughts--Loss Tangent Values

12-06-2017

Numbers are fascinating things, and the way they are presented can influence our thinking far more than we would like to admit, with $15.99 seeming like a much better deal than $16. Likewise, a salary of $60,000 sounds better than one of $0.061 million, even though the latter is a larger number. Our brain has been programmed to suppress the importance of numbers to the right of the decimal point. Such is the case with the loss tangent of materials. It is a tiny number and so to our minds looks insignificant, but it has a directly proportional effect on the energy loss suffered by a dielectric.

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2016

Vias, Modeling, and Signal Integrity

12-05-2016

Remember that good modeling can’t fix a bad design. The model can tell you where a design is weak, but if you have committed your design to product, the model can only tell you how it behaves. Some less experienced designers seem to think a better model will fix something that doesn’t work; it won’t. It will only reassure you that the design was bad in the first place.

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2015

Impedance Control, Revisited

06-10-2015

The positives for new fabricators and designers lie in the fact that, even though impedance control may be new to them, there is a wealth of information available. Some of this information is common sense and some is a little counterintuitive. So, this month I’d like to go back to the fundamentals, and even if you are an experienced hand at the subject, it can be worth revisiting the basics from time to time.

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I3: Incident, Instantaneous, Impedance

03-11-2015

In my December 2013 column, I discussed “rooting out the root cause” and how sometimes, the real root cause is hidden when digging for the solution to a problem. In that column, I described how sometimes in an attempt to better correlate measured impedance with modelled impedance, fabricators were tempted to “goal seek” the dielectric constant to reduce the gap between predicted and measured impedance.

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2014

Tolerant of Tolerance?

03-30-2014

Wouldn’t life be great if everything fit together perfectly? There would be no need for tolerance. However, for that to be the case, everything would need to be ideal and without variation...

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2013

Rooting Out the Root Cause

08-31-2013

When your measured trace impedance is significantly different from the calculated/modeled trace impedance, be careful before jumping to conclusions.

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Changing, Yet Changeless

01-16-2013

Like the whack-a-mole game where the moles keep popping up at random after being knocked back into their holes, the same old questions about technical hurdles surrounding signal integrity continue to surface as technology advances.

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2012

Repeatability, Reproducibility and Rising Frequency: The R3 Predicament

08-29-2012

One of the more popular editions of The Pulse in 2011 was the article "Transmission Lines - a Voyage From DC." Starting again from DC and working through the frequency bands, Martyn Gaudion looks at what is realistic to achieve and where economic compromises may need to be made.

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2011

Transmission Lines – a Voyage From Dc – No, Not Washington ...Part 2

08-01-2011

In the second part of this two-part article we continue on our voyage through a transmission line from DC onwards and upwards through the frequency spectrum, step by step exploring the characteristics from very low to ultra high frequencies.

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Transmission Lines – a Voyage From DC – No, Not Washington, Part 1

07-01-2011

In this two-part article I'd like to join you on a voyage through a transmission line from DC onwards and upwards through the frequency spectrum. In Part 1 we trace the impedance from infinity at DC to the GHz region where it reaches the steady state value of its characteristic impedance.

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Crosshatching Compromise

06-16-2011

Sometimes engineering results in some uncomfortable compromises; this is often the case with PCBs as the mathematical methods used by the modelling tools are based on "ideal" physical properties of materials rather than the actual physical materials in use.

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Correlation, Communication, Calibration

05-31-2011

At ElectroTest Expo at Bletchley Park, UK, Martyn Gaudion noticed the extent to which some technologies change, while the overall concepts do not. Prospective customers still ask exactly the same questions as they did 50 years ago: “What’s the bandwidth? Will it work in my application? How accurate?” Followed by the predictable, “How much does it cost?”

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When Is a 10ghz Transmission Line Not a 10ghz Transmission Line?

03-13-2011

'Just as in life, in electronics the only certainty is uncertainty.' -- John Allen Paulos

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Regional Differences – a Voyage of Glass Reinforcement

01-13-2011

Why bulk Er is not the same as local Er

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2010

The Pulse: Laminates Losses and Line Length, Part II

12-20-2010

In the last edition of "The Pulse," we began a discussion on how a modern field solver can help choose the most cost-effective material for a high-frequency application. Last month we looked briefly at the effects of line length and dielectric losses and this month we focus on copper losses; all three are primary drivers for losses.

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The Pulse: Laminates Losses and Line Length, Part I

12-01-2010

The EE creating the "platform spec" and the PCB fabricator responsible for its realisation face an array of materials with a mix of choices: From ease of processing to reliability requirements and signal integrity. For then next two months, "The Pulse" will focus on signal integrity, describing how to use field solvers to select the best materials when trading cost versus SI performance.

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Signal Integrity – the ‘S’ Words

10-01-2010

Three words, or rather, phrases are in the process of entering the vernacular of the PCB industry, albeit one phrase is already familiar, but taking on a different meaning. All start with S and all relate in one way or another to signal integrity.

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All Set to Measure Differential Insertion Loss?

09-13-2010

This column discusses the gradual adaptation necessary for PCB fabricators as more and more silicon families drive the industry toward the requirement for in house measurement of insertion loss.

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Zen and the Art of Accurate Impedance Measurement* – With Apologies to Prisi

08-12-2010

In his 1974 philosophical novel "Zen and the art of Motorcycle maintenance” Robert M. Prisig contrasts his regular and ongoing daily approach to motorcycle maintenance with his friend's alternate view of leaving well alone between annual service center based maintenance. What has this got to do with accurate impedance measurement you may ask? Please read on to discover more…

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New Column: The Pulse

07-14-2010

Polar Instruments CEO Martyn Gaudion will be exploring a number of themes. A major SI topic that is set to grow is the emergence of new silicon families designed to push traditional materials into the multi-gigahertz arena. These new chipsets lift transmission speeds up to a point where signal losses rather than reflections become the predominant concern from an SI perspective.

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