Electromagnetic radiation from digital circuits can occur as either differential mode or common mode. Differential mode is typically equal and opposite and therefore any radiating fields will cancel. Conversely, common-mode radiation from two coupled conductors is identical. It does not cancel, but rather reinforces.
Unfortunately, differential-mode propagation can be converted to common mode by parasitic capacitance or any imbalance caused by signal skew, rise/fall time mismatch or asymmetry in the channel. Also, return path discontinuities can create large common mode loop areas that increase series inductance and electromagnetic radiation. In this month’s column, I will explore the common symptoms of, and present some cures for, common mode radiation.
Differential-mode radiation accompanies normal circuit operation and is the result of current flowing in the return path loop formed by the PCB conductors. Microstrip (outer layer) loops can act as small antennae that predominately radiate magnetic fields, whereas stripline (inner layer) loops only emit radiation from the fringing fields at the edge of the PCB. Although these signal loops are necessary for circuit operation, their size and loop area must be controlled during the design process to minimize radiation.
Fortunately, it is not necessary to evaluate each loop individually. However, the most critical loops should be analyzed. The other loops can be controlled by good stackup design practices. Please refer to the structural guidelines in my Beyond Design: Stackup Planning Parts 1-4 columns for further information.
Generally, the most critical loops are the highest frequency where the signal is periodic. In a synchronous circuit, the clock is a sequence of repetitive pulses that generates the most emissions. Clock signals should always be routed first, and every effort should be made to route them in the absolute minimum loop area possible. The length of the clock trace should be minimized as well as the number of layer transition vias. On a multilayer PCB, clocks should be routed on a stripline (inner layer) adjacent to a solid reference plane to reduce radiation. The spacing between the clock trace and the return plane should be as small as possible to increase coupling and reduce loop area. Also, to prevent the clocks from coupling to cables, that leave the PCB assembly, the clock circuitry should be located well away from I/O connectors and cables.
Data and address buses, together with their associated command and control signals, are second on the critical list. These buses are normally terminated and can carry large peak currents that radiate proportionally to the current transferred. Transient power supply currents can be another significant source of differential radiation. Although these loops can be quite small, they can carry large currents during switching.
To read this entire column, which appeared in the May 2018 issue of Design007 Magazine, click here.