We know that in the signal integrity world, reflections are usually bad. In clock networks, reflection glitches may cause multiple and false clock triggering. In medium-speed digital signaling, reflections will reduce noise margin, and in high-speed serializer/deserializer (SerDes) signaling, reflections increase jitter and create vertical eye closure.

Reflections happen along an interconnect at any point where the impedance environment around the electromagnetic wave changes. Figure 1 illustrates this with a simple example using a uniform stretch of transmission line with Z_{01} characteristic impedance between Z_{0} reference impedance connections.

The formulas shown in Figure 1 for the G voltage reflection coefficient are generic and express the complex ratio of reflected and incident waves. We can apply the formula to steady-state impedances—something we could measure with a vector network analyzer—or to transient impedances, which would be the case when we use time-domain reflectometry. In general, the impedances that go into the formula—and as a result, the voltage reflection coefficient itself as well—are complex numbers with magnitude and phase or real and imaginary parts.

*To read this entire column, which appeared in the October 2019 issue of Design007 Magazine, click here.*