This month’s column highlights the Monterrey Designers Council Chapter located in Monterrey, Mexico. The chapter was established November 23, 2017, which makes it a younger chapter compared to several other global chapters currently in existence today. I also share news about a new chapter forming in Nogales, Mexico.
Luis Saracho is the president of the Monterrey Chapter and an IPC Certified Advanced PCB Designer (CID+) with a true passion for designing board layouts, not to mention leading and organizing chapter meetings. This chapter has yet to establish a solid leadership team, so Luis is basically running the show on his own there and has been doing an awesome job keeping this chapter active and successful. Their chapter meets quarterly (four times a year) with an average attendance of 12–18 attendees. Chapter meetings are typically held in the evening at a local university (ITESM Campus Monterrey), and most meetings consist of a technical presentation. The chapter is looking into getting government support through CANIETI—an organization that supports technical initiatives—but have had poor results to date.
Chapter Spotlight: Monterrey
by Luis Saracho, CID+, Chapter President
Our recent chapter meeting was held Thursday, May 30, and went well overall. There were around 20–25 attendees from different workplaces (several industry fields were represented, including automotive, industrial, lighting, manufacturing of electrical households, etc.) who shared their experiences with analog/digital/power grounding techniques on printed boards. Areas of conversation included:
- Keeping only one ground plane
- Splitting planes but keeping them connected at a single point
- Pouring with ground the signal layer as ground guards
- Keeping separated ground potentials
At the end of the meeting, the conclusion from the open technical discussion was that there is no recipe that fits for all of the product diversity that people work on. For a graphics controller, 10-layer, mid-power board design rules and considerations cannot be followed on a double-layer, high-power board design for industrial applications.
The only recommendations agreed upon by everyone were to keep the loop between power and its return as small as your layout allows and avoid crossing loops, referring to a wide range of design options. But considering the diverse audience, it was very interesting to hear where they had designs flaw on EMC/EMI and what the engineers did to correct those flaws. You can't apply the same specific rules to different application and technology designs. The magic relies on identifying the aggressive and sensitive loops, and if simulation or testing shows a flaw, understanding the root cause of it. This is not an easy task for printed board engineers.
To read this entire column, which appeared in the July 2019 issue of Design007 Magazine, click here.