Designers Notebook: Flexible and Rigid-Flex Circuit Design Principles, Part 4


Reading time ( words)

Rigid-flex Construction

The most common rigid-flex circuit structure combines the attributes of the thin copper-clad base film and mechanical integrity of the glass-reinforced dielectric. While copper-clad polyimide film is the preferred material choice for the flexible portion of the circuit, the glass reinforced or rigid section(s) of the circuit may include an epoxy polymer or polyimide composition. The construction of the rigid portion of the rigid-flex circuit is very much the same as a standalone multilayer board.

All of the design rules for the glass reinforced-portion of the board (land pattern geometry for mounting surface mount devices, solder mask and the like) are now well-established. One unique facet of fabricating the rigid-flex product is how the flexible portion of the circuit is incorporated with the rigid portion of the circuit. As a general rule for multilayer PCB design, furnish a balanced structure by building up the circuit layers in pairs (4, 6, 8 and so on). Assuming that a single one- or two-metal flex will become an integral part of the rigid portion(s) of the unit, the designer must prepare for the integration of flexible and rigid materials. Ideally, the flexible section will be sandwiched in the center of the multi-layer structure. This allows the fabricator to complete all via forming and plating processes while in a panel format.

Because the flexible dielectric materials are significantly more costly than glass-reinforced organic dielectrics, some fabricators may recommend an alternative approach when integrating the flexible portion of the circuit with the glass-reinforced section. In this case, the flexible portion of the circuit will be designed to protrude a relatively short distance into the rigid structure. Drilled and plated vias are provided just inside the edge of the rigid section to complete the electrical interface between rigid-to-flex materials. Although the hole diameter and spacing is optional, the recommended edge-to-hole-center dimension for this process variation should be a minimum of 3.18 mm (0.125”) and the flexible film portion should extend into the rigid material by an equal amount.

To reduce mechanical stress and avoid damage to the narrow conductors on the flexible portion of the structure, a bead of flexible epoxy, acrylic or RTV silicone is commonly applied at the rigid-to-flex interface to extend the bending area away from the rigid board edge. The applied material forms a fillet profile and becomes a fillet-like strain relief in the rigid-to-flex transition zone.  While the strain relief material will likely not flow beyond the upper surface of the rigid material, it may flow outward across the surface of the flexible dielectric from 1.0mm to 2.5 mm (~0.04” to ~0.10”).

Conductor routing

Determining conductor density and the routing area requirement on the flexible portion of the circuit will depend on the number and width of signal conductors. For both single and two-metal flex the overall width of the base material must also provide adequate surface area for cover-layer film bonding. The general rule for conductor to dielectric edge is a minimum of 0.70 mm (~0.03”), but when possible, a wider area would be preferred.

Flexible circuit suppliers may publish their capability in two classifications, standard and advanced. While fabricators may specify 0.20 mm to 0.25 mm (~0.008” to ~0.010”) conductor lines and spaces for the 34-micron copper foil, 17-micron copper foil may enable a significantly narrower 0.07 mm to 0.13 mm (~0.003” to ~0.005”) conductor. Fabricators with more advanced imaging and pattern plating capability may be able to reduce geometries even further.

Conductor width and the spacing between conductors will be influenced by the copper foil thickness. As noted in Part 1 of this series, copper foils are commonly furnished in thicknesses of 17.0 microns (~0.0007") and 34.0 microns (~0.0014"). Foils as thin as 5.0 microns (~0.00018”) can also be furnished for very-high-density semi-additive circuit routing. Other issues influencing conductor width are current-carrying capacity requirement and spacing required for voltage isolation (refer to Circuit routing principles in Part 2 of this series).

Via Plating

Copper-plated vias are generally required on two metal-layer flexible circuits to provide the electrical continuity between sides. As previously noted, flexible circuit material can be furnished with the copper foil applied directly onto both sides of the base film or laminated onto the base film’s surface with a thin polymer adhesive. There are two basic via plating methodologies employed: button plate and panel plate. The button-plating process is commonly referred to as spot plating or pattern plating. The following is a somewhat simplified overview of via plating processes:

Button Plating

In preparation for button plating, a photosensitive resist coating is applied over the thin copper surface. Following imaging, only a small copper area around vias will remain exposed. The flex material is then subjected to an electroplating process that deposits copper at all exposed via sites. After plating is complete the resist coating is stripped from the base copper surface and made ready for a second coating of photoresist material. This resist material is then imaged and developed to define the final surface interconnect pattern. Only the circuit pattern and plated via sites remain once the chemical etching process removes the now exposed copper material.

Panel Plating

This process can be employed for both adhesiveless and adhesive type copper clad films. There are two panel plate variations in use, selective plate and etch (semi-additive process) and full surface plate and etch (subtractive process):

  • For the selective plate and etch, a photoresist coating is first applied over a thin copper foil or seed layer followed by an imaging process that exposes and defines the circuit pattern and via sites. A copper electroplating process is employed to build up only the exposed circuit pattern and complete the electrical interface at the via sites. The resist coating is finally removed and the remaining thin seed layer is chemically ablated from the base material’s surface.
  • For full surface plate and etch processing, the copper-clad base material will be furnished with all via pre-punched, drilled or laser-ablated. Using the electroplating process, copper thickness is increased over the entire surface of the base composite material as well as completing side-to-side interface of all via features. 

Fabrication methodologies have advanced a great deal. Many fabricators have implemented laser technology for just about every aspect of the manufacturing process. Direct laser imaging (DLI) has streamlined the pre-production process, eliminating film preparation, hard tooling for cover layer and final outline blanking, hole drilling and resist development for both subtractive and semi-additive circuit etching and plating processes. As an example, an established domestic flex-circuit fabricator with DLI process capability published the following:

  • Conductor width and space

            -Standard: 0.08 mm/0.08 mm (.003”/.003”)

            -Advanced: 0.05 mm/0.05 mm (.002”/.002”)

  • Minimum via diameter

            -Standard: (.006”)

            -Advanced: (.004”)

Mechanical Clearances

There are a number of mechanical feature clearance guidelines for the flexible portion of the circuit. For example, the minimum distance between the exterior edge of the flex circuit and the edges of interior located holes and cutouts should not be less than 1.30 mm (~0.050”). A larger distance will likely make a more reliable part. Additionally, the recommended clearance between conductors and unsupported holes, pads or lands supporting hole features is 0.50 mm (~0.020”).

Capabilities and process methodology can vary significantly from one supplier to another, both domestic and offshore. Fabrication and material cost can vary as well. In selecting a source for flexible and rigid-flex circuits the designer must weigh these variables against any concerns affecting communication, logistics and any issue that may impact time-to-market goals. Detailed information for a wide range of dielectric materials are furnished in IPC-4101, Specification for Base Materials for Rigid and Multilayer Printed Boards.

Vern Solberg is an independent technical consultant based in Saratoga, California specializing in SMT and microelectronics design and manufacturing technology. To reach Solberg, click here

Share


Suggested Items

AltiumLive Summit—Munich, Germany, Part 2

11/13/2017 | Pete Starkey, I-Connect007
Pete Starkey continues with his review of the AltiumLive PCB Design Summit held recently in Munich, Germany. The second day commenced with a new product launch. “Working together is hard” it read on the screen. Statistics indicated that 33% of new products were late getting to market, of which 28% were late due to insufficient collaboration, and up to 50% of potential revenue could be lost through being late to market. Then the screen read “NEXUS makes it easy!”

A Deep Look Into Embedded Technology

07/04/2017 | Barry Matties and Patty Goldman, I-Connect007
In preparation for this month’s magazine, we set up a conference call with the goal of uncovering the challenges and opportunities related to embedded technology. Invited were a handful of the industry’s heavy hitters in the embedded world: Retired technologist and I-Connect007 Contributing Editor Happy Holden, and Ohmega’s Technical Director Daniel Brandler and Design & Test Engineer Manuel Herrera.

Launching a New PCB Design Curriculum in Serbia

06/28/2017 | Associate Professor Bojan Jovanovic, University of Niš, Serbia
Let me share with you an experience that I remember from my college days. When I was a student, I had a professor who was too proud of the fact that she was an academic. “You don’t need to know how to manually solder electrical parts or how to design printed circuit boards,” she lectured. “It is important that you understand the formula for charge carrier currents in a p-n junction.” I started working as an R&D engineer for a Swiss company that developed and manufactured instruments for measuring magnetic fields and electrical currents. And nobody ever asked me about charge carriers in p-n junctions.



Copyright © 2017 I-Connect007. All rights reserved.