Failure Mode: Hole Wall Pullaway


Reading time ( words)

Hole wall pullaway (HWPA) is an insidious defect that is not usually a cause of electrical failure. What happens with HWPA is that the copper plating in a plated through-hole (PTH) is pulled away from the dielectric of the drilled hole wall. The hole must not be filled with any sort of a hole fill in order to see HWPA.

There are two distinct types of HWPA: stress-relieving and stress-inducing. In stress-relieving HWPA, the condition appears to distress the PTH, allowing it to survive hundreds or thousands of thermal cycles without failure. In stress-inducing HWPA, the stress appears to greatly increase, causing the PTH to fail in just a few thermal cycles. What we consider a failure is an increase greater than 10% in the overall resistance in the circuit. A crack that partially bridges the copper at the internal interface is enough to cause a failure.

This column is based on my experience in test reliability of interconnect stress test (IST) coupons. I am addressing HWPA that features moderate to severe outgassing. There may be HWPA due to thermal stressing of the board without any significant outgassing, but this type of HWPA is subtle, and it presents as a dark line between the plating and the dielectric of the hole wall. This type of HWPA is rarely detected.

Stress-Relieving HWPA

Stress-relieving is the most common type of HWPA. It appears that the adhesion of copper plating to the dielectric is reduced most likely due to problems with the application of electroless copper plating adhering to the dielectric of the hole wall. At the same time, the adhesion is strong at the copper’s internal interconnection. In fact, experience suggests that the adhesion of the electroless copper is stronger than the copper plating. This process frequently produces strong interconnections to copper inner layers. This condition may result in a hole wall that looks like a stack of forward or backward “Ds” running the length of the hole where the top and the bottom of the “Ds” is at an internal interconnect.

To read this entire article, which appeared in the August 2015 issue of The PCB Design Magazine, click here

Share

Print


Suggested Items

AltiumLive Frankfurt 2019: Rick Hartley Keynote

11/25/2019 | Pete Starkey, I-Connect007
Introduced by Lawrence Romine, Altium’s VP of corporate marketing, as a “low impedance presenter with a passion for his topic,” Rick Hartley delivered the opening keynote at the AltiumLive 2019 European PCB Design Summit in Frankfurt, Germany. Pete Starkey provides an overview of Hartley's presentation, entitled “What Your Differential Pairs Wish You Knew."

Why Does the PCB Industry Still Use Gerber?

11/07/2019 | Karel Tavernier, Ucamco
Every so often, I hear technologists ask why so many PCB designers still use Gerber. That is a fair question. Ucamco has over 35 years of experience in developing and supporting cutting-edge software and hardware solutions for the global PCB industry. Our customers—small, medium, and large PCB fabricators—include the electronics industry’s leading companies, and many of them have been with us for over 30 years. We are dedicated to our industry and excellence in everything we do, which includes our custodianship of the Gerber format.

Communication, Part 5: Internet Impedance Calculators for Modeling

11/05/2019 | Steve Williams, The Right Approach Consulting LLC
Bob Chandler of CA Design and Mark Thompson of Prototron Circuits address how new engineers use internet impedance calculators for modeling (e.g., formulas versus recipes) in Part 5 of this series. Do you use impedance calculators that you found on the internet? Read on!



Copyright © 2019 I-Connect007. All rights reserved.