Effective Characteristic Impedance


Reading time ( words)

In a typical interconnect, there lie multiple places where capacitance plays a factor in the signal integrity. This includes the driver and receiver output/input capacitance, as well as the packages, vias, and the transmission lines. Failing to optimize these parameters can often lead to unwanted reflections, excessive radiated and or conducted emissions, and sometimes failure of components and systems.

Reflections can occur anytime there is an impedance mismatch on the line. Sources of mismatches are plentiful and include trace width changes, vias, stubs, reference plane changes, and even the so-called fiber weave effect. In this case, a trace can encounter a different dielectric constant depending on whether it is routed over glass or the epoxy resin in the dielectric material. 

In this investigation, it is the capacitive contribution of the different components that are of interest, and how they affect the characteristic impedance the driver sees. 

To read the rest of this article, click here.

Share


Suggested Items

Exciting New Technology: Thermal Risk Management

03/01/2017 | Douglas G. Brooks, PhD
Two years ago I entered into a collaboration with Dr. Johannes Adam, from Leimen Germany. Johannes has written a software simulation tool called Thermal Risk Management (TRM). We used it to look at the thermal characteristics of PCB traces under a variety of conditions, and it is hard for me to contain my excitement and enthusiasm for what it does and what we learned about traces using it. Our collaboration resulted in the publication of numerous articles and a book. In this article, I’ll talk about some of the capabilities of TRM that really caught my attention.

Brooks' Bits: Your Traces Have Hot Spots!

08/24/2016 | Douglas G. Brooks, PhD
The reasons for the temperature variation at high temperatures are not too hard to understand. There may be minor contamination under the trace or in the copper that accounts for it. Certainly, at higher temperatures (say above about 300°C) the board may begin to delaminate, severely disrupting its cooling characteristics. There may be small variations in trace width or thickness that help account for the delam, and these effects would be randomly distributed along the length of the trace.

Brooks' Bits: How Many Vias Does It Take To…?

05/04/2016 | Douglas G. Brooks
During 2015, I enjoyed a very productive collaboration with Dr. Johannes Adam, from Leimen, Germany. This resulted in several papers, but one in particular is relevant for this column, “Via Currents and Temperatures.” In that paper, we used a simulation tool, thermal risk management, developed by Dr. Adam, to simulate current flowing through a via and then determine the temperature of the via. Read on to find out how our results contradicted conventional wisdom.



Copyright © 2017 I-Connect007. All rights reserved.