Sink or Swim at 28 Gbps

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Abstract How do you know that your signal integrity software is qualified for the analysis of interconnects with signals running at 28 to 32 Gbps? The software vendor told you so? How does the vendor know? Most of the time, it is a “sink or swim” situation for the SI software user. One way to figure it out is to use a validation platform, such as Wild River Technology’s CMP-28/32 Channel Modeling Platform, which provides interconnect structures specifically designed to benchmark the signal integrity software at these data rates. Just run the post-layout analysis of interconnects on the validation platform and compare with the pre-qualified measurements taken by an expert up to 50 GHz. The validation process may be that simple in general, but some peculiarities are discussed in this article.


Design of PCB and packaging interconnects for data links running at 28to 32 Gbps bitrates and beyond is a challenging problem, to say the least. It requires accurate electromagnetic analysis over extremely broad frequency bandwidth from DC to 40 to 50 GHz. What complicates it further is the absence of the broadband frequency-continuous dielectric and conductor roughness models. In addition, the final board is not usually manufactured as designed due to uncontrolled variations and manipulations by the board manufacturers to “dial in the impedance.”

It is also extremely difficult to make high-quality measurements up to 50 GHz. So is it possible to design and manufacture interconnects and have acceptable analysis-to-measurement correlation up to 40 to 50 GHz systematically? To answer, four necessary elements for design success were formulated. One of the elements is systematic benchmarking of manufacturing, measurement, and the software. Systematic in this context means analysis-to-measurement correlation is observed, not just for one or two structures (test coupons for instance), but rather for a broad range of typical interconnects: Single-ended and differential, stripline and microstrip, simple planar and with the vertical transitions or vias, etc.Read the full article here.Editor's Note: This article originally appeared in the October 2014 issue of The PCB Design Magazine.


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