PCB and Packaging Design up to 50 GHz: Identifying Dielectric and Conductor Roughness Models


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Meaningful interconnect design and compliance analysis must start with the identification of broadband dielectric and conductor roughness models. Such models are not available from manufacturers and the model identification is the most important element of successful interconnect design for link paths with 10–50 Gbps and higher data rates. Electromagnetic analysis of interconnects without such models may not be accurate. An overview of broadband dielectric and conductor roughness models for PCB and packaging interconnect problems is provided in the paper. Theory of model identification with generalized modal S-parameters and separation of dielectric and conductor dispersion and loss effects is described. Practical examples of successful dielectric and conductor roughness model identification up to 50 GHz are also provided.

Introduction

The largest part of interconnects can be formally defined and simulated as transmission line segments. Models for transmission lines are usually constructed with a static or electromagnetic field solvers. Transmission lines with homogeneous dielectrics (striplines) can be effectively analysed with quasi-static field solvers and lines with inhomogeneous dielectric may require analysis with a full-wave solver to account for the high-frequency dispersion. Accuracy of transmission line models is mostly defined by availability of broadband dielectric and conductor roughness models. Wideband Debye (a.k.a. Djordjevic-Sarkar or Swensson-Dermer) and multi-pole Debye models are examples of dielectric models suitable for accurate analysis of PCB and packaging interconnects. Read the full article here.Editor's Note: This article originally appeared in the February 2014 issue of The PCB Design Magazine.

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