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Zulki's PCB Nuggets: The Intricacies of RF Design & Assembly
March 26, 2013 |Estimated reading time: 7 minutes
Editor's Note: This article originally appeared in the February 2013 issue of SMT Magazine.
Decades ago, successfully and economically completing an RF design was a monumental, almost impossible task due to the fact that much of the necessary technology and know-how were not available. Consequently, great demand for such design just didn’t exist, although most focused on costly applications going to high-end industrial and mil/aero applications. Today, the demand is back, and growing, as greater numbers of handheld portable communications applications escalate in practically every facet of life. Yet, the same basic principles of the past, and a few new ones, play vital roles in achieving high-caliber RF design and assembly.
The PCB designer and assembly engineer must be experienced enough to skillfully and successfully cope with and properly handle countless intricacies dealing with an RF design and manufacturing. Hundreds of such intricacies exist with this technology and the PCB designer and assembly engineer must have enough savvy to maneuver through such a maze. Here, I want to focus on only the most important issues facing engineers.
PCB Design Intricacies
At the top of the list of PCB design intricacies is the need to fully understand how, what, why, and when to optimize. One must always ask: Does the PCB designer know enough about RF to apply the right optimization techniques? It’s vital to have a good handle on this aspect of the process because the PCB designer must create an RF design right the first time--without mistakes.
He or she must keep in mind RF integrated circuitry architecture. Specifically, this means the designer must segregate and divide different frequency spectrums within the circuitry. As part of this design step, it’s important to properly design so-called self-shielding circuitry to isolate or curtail electromagnetic frequency (EMF) effects (Figure 1). In most cases, an RF design may have four to six shields at different board locations as a means of containing different frequencies within the same RF circuitry on a board.
If PCB designers are dealing with high frequency, they must keep that module separate when it comes to layout. As far as low-frequency analog, those modules must be clustered together when routing is performed. Likewise, CMOS low-frequency digital circuitry has to be lumped together and set aside from the other circuitry.
By taking this approach, the PCB designer is optimizing the design. As a result, damaging spikes and jitter in the signal are avoided. When there is a considerable high-end frequency delta between circuit portions special attention must be given to separating them. At times, in these instances, a ground plane or pour must be created in the middle. Sometimes, the RF signal needs to be routed on different layers if there are extremely different circuit spectrums running on the board.
For example, an extremely high frequency can be routed on one layer while a low frequency is routed on another. This technique isn’t required in every instance, but it’s a good idea. However, it comes with a cost factor because fabrication of high layer count is more expensive, although with RF circuitry some extra cost is acceptable and often as crucial since it incurs non-standard design practices.
Balanced and Tuned
Aside from optimization, non-standard practices include the fact that RF circuitry has to be balanced and tuned. The PCB designer must make sure transmit and return paths are equal in length and within extremely tight tolerances of impedance control and match length. A rule of thumb, strange as it may seem, is that layout aspects—taken for granted in a commercial PCB design—might otherwise be creating problems in a PCB populated with RF circuitry. PCB design rules take on new meaning when it comes to RF design.
For example, placing a distributed power plane between two ground layers enables an evenly distributed field for RF. In effect, it creates an even amount of decoupling capacitors between supply and ground. Plus, a power plane provides a very low-impedance path at radio frequency.
The PCB designer must also control radiated emissions at the board edge levels. For example, if he or she is dealing with noisy power supply traces on a two-layer board, those noisy traces are more difficult to resolve compared to the same noisy traces on a four-layer board. Also, transmit and return current paths must be carefully devised if there is a ground in a power plane targeted at suppressing cross-talk and noise generating events within the board.
Avoid Going Under RF Circuitry
Moreover, the PCB designer must make sure those transmit and return paths are not routed under RF circuitry blocks. If a return current path is routed under RF, then it’ll create problematic jitters and spikes, thus mismatching the impedance, and the PCB designer has to correct this issue when the board undergoes a second iteration.
A common low-impedance ground plane offers a robust and practical solution for creating a balanced approach. But there is no generic solution for every case--special consideration must always be given. In this category, unusual, unexpected, and strange issues show up when designing RF circuitry. Experience pays handsomely here because the savvy PCB designer must intuitively deal with those unorthodox aspects. In most instances, they’re difficult to explain, but the experienced PCB designer correctly resolves them.
Decoupling capacitors represent another design intricacy category. Here, the PCB designer must make sure current loops are minimal. Minimum current loops reduce unnecessary impedance mismatches and careful decoupling avoids noise generation from circuitry such as reference oscillators or frequency synthesizers. How do you minimize current loops? They are minimized by placing the decoupling capacitors and the port being decoupled to the ground plane or via as close as possible. Assurances must be made that each decoupling capacitor has its own via connection to the ground. If too many decoupling capacitors are tied to one via, noise suppression efforts will be diluted, resulting in an uneven signal and inaccurate return path. On the contrary, the idea is to avoid shared via and make sure only one via is ground at a time when using decoupling capacitors.
The PCB designer must also make sure power supplies are decoupled as close as possible to localized ground planes. If there are multiple ground planes on the board, it’s critical that power supplies are localized as well.
The thermal relief pad under an RF device is yet another intricacy to be dealt with. As the name implies, it provides both thermal relief and a solid ground reference to the RF chip. This pad is used not only to radiate the heat the IC generates, but is also the shortest possible connection from that chip portion to the reference ground plane. Normally, it’s connected from the component side to the ground and then the localized ground is connected to the main ground.
When using thermal relief to distribute the vias, the PCB designer should distribute or diversify the vias and not localize them in one section--the goal is to have an even factor of getting to the ground plane and a normalized way of heat transfer for optimum distribution. The PCB designer can stitch different vias together whereas the connection of the thermal relief pad uses multiple vias. The thermal relief pad can be directly stitched to the main ground layer rather than going through the localized way. These and other methods are used to assure that transmit and return paths are even and possess matching impedances.
PCB Assembly Intricacies
Test accessibility is embedded once the PCB RF design is completed and before it goes to production or right after new product introduction (NPI) is performed. Test accessibility depends on the type of coverage the design requires. An experienced PCB designer assures 70 to 80% minimum test coverage, whereas an inexperienced designer might settle for 30% testability. Even if the board is subjected to flying probe testing--if minimal coverage is designed in--the test is not going to be effective.
After the board is tested, some RF circuits will likely require tuning. Tuning means a number of different steps of which only a savvy assembly engineer is aware. For example, the frequency of some relays may need changing; a potentiometer might need adjusting; or a variable resistor network may need its resistance changed. All tuning is performed to achieve the correct match and allow the product to properly transmit and receive.
These and others are the intricacies involved at assembly in terms of tuning. It may take a little, or a lot, of time for proper tuning to be performed, but once the RF PCB is tuned, engineers should avoid touching the board to prevent causing new problems or disrupting previous tuning work.
Zulki Khan is the founder and president of NexLogic Technologies, Inc., in San Jose, California, an ISO 9001:2008-certified company, ISO 13485-certified for manufacturing medical devices and a RoHS-compliant EMS provider. Prior to NexLogic, Khan was general manager for Imagineering, Inc. in Schaumburg, Illinois. He has also worked on high-speed PCB designs with signal integrity analysis. He holds a B.S. in EE from NED University in Karachi, Pakistan, and an M.B.A. from the University of Iowa. He is a frequent author of contributed articles to EMS industry publications.