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The Future of Multiclock Systems
August 26, 2009 |Estimated reading time: Less than a minute
The clock requirements of high-performance systems vary from the chip to the circuit to the system level, but in every case the ideal is a fully synchronous system. Problems with traditional synchronized architecture have led designers to develop clever asynchronous designs at both the system and circuit level. This paper, written by Ransom Stephens of Ransom Notes and Jorge Gomez and Roman Boroditsky of NEL Frequency Controls and presented at DesignCon, introduces an approach to synchronized clock architecture that has the performance of full synchronization with no central clock, no fan-out, and the surprising effect that system jitter is reduced as more clock groups are added.
Click here to read.