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Modeling Issues and Possible Solutions in the Design of High-Speed Systems With Signals at 20 Gb/s
June 17, 2009 |Estimated reading time: Less than a minute
In high-speed digital systems with signals at 20 Gb/s, standard approaches used to study signal integrity at PCB and package level are not valid anymore. IBIS models are no longer accurate and H-Spice transient simulations face convergence and stability problems. With the increased operational frequency the metal losses of standardtransmission lines at PCB level are not only related to the material characteristic, but they are also related to effects like surface roughness and tapered cross section. How to address these problems? This paper, written by Antonio Ciccomancini Scogna of CST of America and Jianmin Zhang, Kelvin Qiu, and Qinghua Bill Chen of Cisco Systems, provides answers by considering a few test cases as well as more complex multilayer PCBs.
Click here to read this paper, presented at DesignCon.