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E/CIT Program Yields R&D, Training
January 16, 2008 |Estimated reading time: 5 minutes
First, a little background on E/CIT. The objective of the Emerging Critical Interconnect Technology Program, (E/CIT) is to assure that the U.S. military and electronics industry have early access to emerging interconnect technologies. The military is focused on improving its current and future systems through E/CIT.
The center of these activities is the Naval Surface Warfare Center Crane, also known as NAVSEA Crane, near Bloomington, IN. The Navy base was established in 1941 as a weapons depot. Over the years it has evolved into a highly specialized facility dedicated to the development of high-tech electronics, ordnance and other warfare support.
The E/CIT circuit facility at Crane boasts a complete state-of-the art PCB design and manufacturing shop, a comprehensive failure analysis laboratory, an environmental test and evaluation laboratory, and extensive computer modeling capabilities. The facility employs a staff of 3,400, with scientists, engineers and technicians making up 57% of this total.
E/CIT is a collaboration between the military and the electronics industry; IPC has supported Crane and has been active in the creation of E/CIT. The project provides facilities for conducting R&D for advancing the PCB design and manufacturing processes, as well as facilitating interactions between the military and OEMs, PCB designers, fabricators, material suppliers and academia.
You are probably thinking, "That's all nice, but how does that help me advance my designs?" Let's take a look as what's happening at E/CIT.
Embedded Passives Test Bed Project
This project provides a structure in which industry and military can work together to adopt the embedded passives technology into real-world products, for both commercial and military applications. Jason Ferguson manages this effort. We have learned to design and manufacture embedded passives by using all of the current commercially available resistor and capacitor materials.
Three hands-on training programs were conducted in 2007, with PCB designers comprising the majority of the attendees. During the two-day "Design and Build a Board With Embedded Passive Components" classes, each attendee designs and builds a circuit board featuring embedded passives. A fourth workshop is scheduled for June 3-4, 2008 at Crane.
A project dedicated to the high-frequency testing of resistor and capacitor materials is close to completion. The results of these evaluations will be available to you by mid-2008.
The Product Emulator project is moving forward, incorporating the embedded technology into three different OEM heritage designs. These will be complete by the end of 2008 and all of the performance enhancements and lessons learned will be made available.
We are developing a "Focus Module on Embedded Passives" for IPC to use as part of their Certified Interconnect Designer (CID) training and certification program. It is intended only for advanced training; the module will not be attached to the exam and certification.
Training Workshops
E/CIT research has yielded several training workshops. IPC has been assisting in the development of hands-on programs for engineers and technicians from other disciplines. The first of these was launched in September 2007, a two-day workshop entitled "Fundamentals of Classic, HDI, Hybrid, Flex/Rigid Flex Multilayer Printed Circuit Board Technology." It is the foundation for a multipart series that will move progressively through advanced and state-of-the-art PCB technologies, combining classroom lecture with hands-on fabrication experience in a cutting-edge PCB manufacturing facility. This training program builds a strong foundation of knowledge and understanding for the PCB user community including engineering, design, project management, materials and process, manufacturing, quality, and procurement. The course will be conducted again March 4-5, 2008 at IPC in Bannockburn, IL.
The second PCB training course in the series, "Hands-on PCB Manufacturing 101 -Conventional Inner-layer Processing," will be conducted at Crane April 22-24, 2008. During this class you will learn the types of input information provided by OEM clients and how the PCB manufacturer uses this information to set the job up for optimum manufacturing. Also, you will learn about process and acceptance test coupons, requirements, and how they help control processes. In addition to that you will also learn different image methods, and the thresholds of resolution, side-to-side layer registration produced by these processes. The effects of copper foil, type, thickness and core material on line and space thresholds and layer registration will be studied.
Although the course is designed for process engineers or process engineering students, designers preparing for the CID exam will also benefit from this course, as will OEMs' material and process engineers needing to learn more about PCB manufacturing technology.
The third course in the series, "Hands-on PCB Manufacturing 102 - Conventional Outer-layer Processing," will be conducted at Crane on May 28-30, 2008. This course takes the inner layers of the 101 module workshop and runs them through the balance of the fabrication processes. Lamination methods, via formation, plating and finishing processes, testing and coupon analysis will be covered.
In this workshop, attendees will learn lamination tooling methods. Pressing and flatness issues of MLBs, mechanical drilling, drill machines, drill bits, stacking, set-up and accuracy will be studied. Outer-layer finishing, soldermask, traditional and lead-free solders and alternative finishes will be taught. Finishing the final board profile and preparing it for final inspection and acceptance is also covered. All inspection and test methods are included.
Note the dates for the last two courses are three days. The courses are actually two and a half days in length; it was not possible to cover all of the material in two days. In reality, due to the proximity of the Crane facilities to Indianapolis, your time away from home is usually no different than if it were a two-day class.
The research continues at Crane, thanks to E/CIT. Expect PCB designers, manufacturers and suppliers to benefit from this ongoing military/commercial activity.
Assistance with applications of embedded passive components is available at any time. Contact me at rsnogren@comcast.net, 303-898-9340, or Jason Ferguson, jason.ferguson@navy.mil, 812-854-6535. Or visit the facility at Crane if you'd like to create a project to support your application requirements.
Richard Snogren is the founder of Bristlecone LLC, a technology consulting service. Snogren co-founded SAS Circuits, now Coretec Denver, and he managed the electronic packaging and PCB design groups for Martin Marietta Astronautics. Known for his seminars and technical articles on embedded passives, he has been active with the E/CIT program and the Advanced Embedded Passive Technology Research Consortia.