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Endicott Interconnect's SiP Designs Reduce PWB Size, Weight, Complexity and Cost
October 24, 2007 |Estimated reading time: 1 minute
System in Package (SiP) designs from Endicott Interconnect (EI) Technologies reduce size and weight, sweep multiple packages from a printed wiring board (PWB) into a SiP for improved electrical performance, and reduce PWB complexity and cost. The result is a significant "shrink" in package size and an enormous expansion in performance per sq. in. of PC board real estate.
EI can use its SiP technology to achieve reductions in PCB real estate up to 27x less than that of the original PCB. This is accomplished by replacing many of the packaged components with bare die and combining the Company's extensive experience in thermal solutions with EI's PTFE-based HyperBGA(R) or CoreEZ(TM) organic semiconductor packages featuring thin core build-up flip chip technology. These semiconductor packaging solutions offer exceptional electrical performance, wireability and reliability.
For example, a 7.75" x 15" PCB can be re-designed to a 2.2" x 2.2" size using a 3-4-3 CoreEZ(TM) substrate with 4 signals, 6 planes and 30 micron lw/ls; and an assembly that includes 5 flip chip FPGAs, CSP memory, passive components, SMT components, PGA connector and 2-sided assembly.
Another SiP conversion using reduced package size components and CoreEZ(TM) technology condensed a single board computer (SBC) design from 25 sq. in. to 9 sq. in.
Also, for a round, extremely thin SiP package on a CoreEZ(TM) 2-6-2 substrate with buried passives, EI's SiP designs are not physically limited to a square or rectangular shape, should the application call for something "out of the box".
Substrate design integration at system level is the key, according to EI, to achieving substantial reduction in PWB design complexity and cost. Elements include:* Organic substrates for significant weight reduction (thin PTFE substrates are typically 1/10 the weight of a comparable ceramic substrate)* Thin substrates for significant electrical performance improvements * SiP designs for shorter signal paths* Pinned or BGA PWB interface
For more information, contact Endicott Interconnect Technologies, Inc. 1093 Clark Street, Endicott, New York 13760. Tel: 1-866-820-4820; Fax: 607-755-7000. Or visit www.eitny.com.