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Shrinking Silicon: A Warp Speed Facilitator
As we all learned by watching Star Trek, a lot of crazy things can happen at warp speed. There’s just no room for error at warp speed. Now, many PCB designers are dealing with increasing signal speeds and rise times, and a parliament of other effects—some positive, some negative—thanks to shrinking silicon. Not quite warp speed, but a lot of unpredictable things can happen when the die gets tiny.
So, in this issue, our expert contributors discuss the causes and effects of silicon shrinkage, including how to better manage EM strategies and signal integrity, as signal speeds and rise times continue their trek toward warp speed.
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Shrinking Geometries: Back to Fundamentals to Fight EMI
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Andy Shaughnessy, Design007 Magazine
Dan Beeker is technical director at NXP Semiconductors, a veteran design engineer, and an instructor who has spent years helping students and customers battle EMI through building a better understanding of electromagnetic fields and field theory. In this interview, Dan explains what happens when silicon shrinks, how feature size controls signal speed, and why this marks the perfect time to return to the fundamentals of physics and field theory.
Advanced Packaging Means Advanced Routing Issues
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