Happy Holden on Gerry Partida’s ‘Significant’ Microvia Reliabilty Paper


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Gerry Partida, vice president of technology at Summit Interconnect, authored a technical paper, “Next Progression in Microvia Reliability Validation—Reflow Simulation of a PCB    Design Attributes and Material Structural Properties During the PCB Design Process,” at IPC APEX EXPO 2022, and it’s worth revisiting. This significant paper on microvia reliability validation provides a summary of what’s been happening in the microvia fabrication arena, especially regarding the issue of latent defects in stacked microvias. The paper is available for download here.

Partida offers a thorough look at the controversy initiated in 1996 when latent electrical defects began showing up in field-deployed boards using microvias. My familiarity with this topic dates to 2000, when IPC organized round robin testing of microvia technologies. All looked good, and HDI technology took off. As evolution would have it, the technology grew and diversified. But all the new variants were not necessarily tested like the initial round in 2000.

As Gerry summarizes, “Today, the industry is facing a similar challenge with microvia reliability, especially after reflowing of the PCB at assembly, during rework, or operating in the field. As with the shortcomings of electrical testing in the past, the industry designed PCBs with microvias without evaluating the thermal properties of the material or the geometries in the design. Fabricators produced the finished goods and evaluated the finished PCB to established performance standards such as IPC-6012. When difficult-to-detect failures occurred post assembly, a test method IPC-TM-650 2.6.27 was established and a caution was added to the IPC- 6012 Rev E in Section 3.6, Structural Integrity. The testing of a D coupon via IPC-TM-650 2.6.27 did validate that the finished PCBs were safe for assembly, but it did not stop a fabricator from building a bad design.”

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Many studies have shown that the failures seem to be initiated at the interface of the microvia target pad and the plated microvia interface—a plain “butt joint.” As the elevated temperature of lead-free assembly reflow is employed, the stress on this joint exceeds what it can accommodate, unlike tin-lead reflow that occurs at a lower temperature. What caught us unprepared is that after reflowing, the joint appears to be okay and will pass other performance testing, waiting until it fails in the field. This explanation seems to be validated by research that iMEC in Europe has conducted for the European Space Agency. Their finite element analysis of the microvia structure shows the maximum stress at this location and the stress increases as you stack the microvias and increase the temperature.

To read this entire article, which appeared in the November 2022 issue of Design007 Magazine, click here.

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