White Paper: Optimization Methods for High-Speed SerDes Channels


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Cost-effective implementation of these high-bandwidth channels across high-volume manufactured products requires analysis of many design and manufacturing parameters.

This Siemens white paper presents a new approach for the systematic analysis of SerDes channel compliance at 25Gbps and above. Using a 100GBASE-KR4 electrical backplane design, the methodology reveals the system's sensitivity to various design variables, intelligently explores the design space, and provides a high-level description of the automation involved in the analysis process. Demand for higher bandwidth has greatly increased the signaling data rates for SerDes.

To download this Siemens white paper, click here.

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