EIPC Technical Snapshot: Updates, Methods, and Interconnections

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pete_starkey_200.jpgNot a lot happens in August, when European industry traditionally takes its summer holidays, ready to bounce back re-energised and invigorated in September. EIPC, the European Institute for the PCB Community, got the autumn webinar season off to a flying start with the 11th in its series of Technical Snapshots.

Alun-Morgan-new-250.jpgEIPC president Alun Morgan introduced and moderated a programme of three enlightening and highly informative presentations, the first of which was delivered by his colleague, EIPC vice president Emma Hudson, with an important update on the subject of UL solder limits. “Change is coming. Be prepared!” was the message.

Emma Hudson: UL Safety Standards
A familiar face at EIPC conferences, with over a decade of experience in establishing and revising international electronics standards, as well as skilfully guiding manufacturers and suppliers through the intricacies of qualification and certification, she explained that solder limits were key parameters for UL Recognized PCBs. They represented the soldering processes to which the PCB would be exposed during component assembly operations, and significant changes were imminent.

New editions of the UL safety standards UL 796 for printed wiring boards, UL 796F for flexible circuits, UL 746E for laminates and coatings, and UL 746F for flexible materials, had recently been published and all included standardised solder limits and assembly solder process requirements. These defined all the time spent over the maximum operating temperature, or 100°C whichever was greater, and the maximum temperature reached as measured on the surface of the PCB. They were employed in many of the test procedures used to characterise a PCB as part of the Recognition process and if exceeded during PCB assembly, the safety evaluation conducted on that PCB was invalidated.

Emma_Hudson.jpgSignificantly, the standards now included a new default solder process condition, six cycles of the IPC T260 profile, although it was acceptable to request the T230 or T245 profiles, and/or fewer cycles if these were truly representative of the assembly solder process conditions to which the PCB would be exposed.

UL had issued a bulletin to all manufacturers with PCBs Recognized under UL 796 and UL 796F explaining the concept of standardised reflow profiles, the updates to the standards and how they would be implemented.

UL Follow-Up Services would verify that any board certified from January 1, 2022, had suitable solder limits and assembly solder process parameters for the actual process, the inspection would be at the assembly company rather than the PCB manufacturer, and if any PCB was not Recognized with the appropriate parameter it would be deemed a non-conformance. Any changes or modifications to existing PCB types, including the addition of new materials, conductor parameters, solder limits, maximum operating temperatures and flammability rating made from January 1, 2022 would also be subject to the new inspection criteria. Existing board types that remained unchanged could be left as they were.

Hudson discussed the details of the testing that would be involved in increasing solder limits or adopting the default assembly solder process conditions, and commented that if the materials detailed for that board type did not meet the requirements of the CCIL Program or Permanent Coatings Program, then it would be necessary to test bond strength and delamination for every base material, flammability uncoated for each base material and flammability coated for each solder resist.

This highlighted the need for laminate and solder resist manufactures to update their materials to the new solder limits and assembly solder process parameters, preferably to the default of six cycles of the T260 profile, otherwise the PCB manufacturers would face much more testing.  And she advised them to start talking to their laminate suppliers without delay about their plans to upgrade their material Recognition. Some testing would still be needed to upgrade PCBs to the new assembly solder process solder limits but if materials had the new values the amount of testing could be reduced. Similarly, solder resist suppliers could adopt the default assembly solder process parameters and their associated flammability testing requirements. She emphasised the need for urgency in preparing samples and conducting testing, in order to minimise the impact on the PCB manufacturer and the imminent deadline.

Her advice to PCB manufacturers who had impending changes to existing PCB types was to consider the creation of duplicate types in their UL files, making copies that could then be updated as and when necessary, depending on the ease of maintaining the PCB type designation with their customer. And it was a good time to consider adding materials for which the solder limits had not been updated, provided there was no plan in place to update them, as well as taking the opportunity to have a clear-out of any materials no longer used.

Her closing words were “It’s been talked about for years, but it’s finally happening. Be prepared!”

Marko Pudas: Atomic Layer Deposition
“Changing the world one atomic layer at a time” was the tagline of Dr. Marko Pudas, IP, PCB technology and EU project manager with Picosun in Finland, pioneers in advanced coating technologies. He discussed recent achievements and lessons learned using atomic layer deposition (ALD) in the conformal coating of PCBs and assemblies for protection in space and medical applications.

EIPC_MarkoPudas_0919.jpgPicosun had started ALD production in 2004, and the 16th generation of ALD tools was currently on the market. The technology was well-established in manufacture of integrated circuits. Dr Pudas described its potential for use in creating solder masks and corrosion barriers in high-reliability PCB applications for demanding environments. He drew some interesting parallels between the challenges of protecting the PCB and the human body from each other and the inertness and corrosion resistance demanded by space electronics, referring to projects funded by the European Space Agency (ESA) to validate ALD coatings for complete conformal protection of printed circuit assemblies, the encapsulation of plastic component packages and the mitigation of tin whiskers.


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