Todd Westerhoff on the Value of Solid Design Skills


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I recently caught up with Todd Westerhoff, product marketing manager for Mentor’s HyperLynx signal integrity (SI) tools. Todd discusses some of the challenges that he and his customers are facing and why good design skills have more influence on a PCB than any software tool.

Andy Shaughnessy: Hi, Todd. For those who may not be familiar with you, give us a quick background about yourself and your time in PCB design and EDA industries.

Todd Westerhoff: I’ve been working with system simulation tools for the past 40 years. I started with digital logic/timing/fault simulation at GenRad and HHB Systems, added circuit simulation at FutureNet, VHDL at Racal-Redac, RF/ microwave analysis at Compact Software, and then got into high-speed design while consulting through ViewLogic. I’ve spent the past 23 years in SI, working for Cadence, Cisco, SiSoft, and Mentor, A Siemens Business in both design engineering and EDA marketing roles. I consider myself fortunate to have been both a user and provider of EDA tools; I think my experiences as a designer help me make better decisions with the capabilities we’re developing today.

Shaughnessy: What do you see as the biggest challenge right now for PCB designers and design engineers?

Westerhoff: SI has been one of those things that people have typically “left to the experts.” When I worked at Cisco, we had centralized SI groups supporting multiple design teams. The design team looked to the SI expert to determine what the routing rules should be and validate the design once routing was available. That worked when the number of critical interfaces in designs was small, but that’s no longer the case. Just about every signal on every design now qualifies as “high-speed” if you compare the driver’s edge rate to the net’s electrical length.

But what’s a designer supposed to do? There aren’t nearly enough SI experts to go around, and the ones we do have are focused on the cutting edge stuff. Designers still need to make tradeoffs on high-interfaces when they can’t route “according to pre-defined rules,” but they don’t necessarily have access to the analysis support they need. That suggests that basic design simulation needs to be part of the designer’s desktop toolkit, although progress has been slow in that area. I would maintain that the same is true for other disciplines. It’s not just SI—you can add power integrity (PI), EMI/EMC, thermal, and others to that mix. A designer needs to know a lot about many different disciplines to be successful today.

Shaughnessy: What do you see as the biggest challenge right now for PCB designers and design engineers?

Westerhoff: SI has been one of those things that people have typically “left to the experts.” When I worked at Cisco, we had centralized SI groups supporting multiple design teams. The design team looked to the SI expert to determine what the routing rules should be and validate the design once routing was available. That worked when the number of critical inter-faces in designs was small, but that’s no longer the case. Just about every signal on every de-sign now qualifies as “high-speed” if you com-pare the driver’s edge rate to the net’s electrical length.

But what’s a designer supposed to do? There aren’t nearly enough SI experts to go around, and the ones we do have are focused on the cutting edge stuff. Designers still need to make tradeoffs on high-interfaces when they can’t route “according to pre-defined rules,” but they don’t necessarily have access to the analysis support they need. That suggests that basic design simulation needs to be part of the designer’s desktop toolkit, al-though progress has been slow in that area. I would maintain that the same is true for other disciplines. It’s not just SI—you can add power integrity (PI), EMI/EMC, thermal, and others to that mix. A designer needs to know a lot about many different disciplines to be successful today.

In most companies, the “design review” is how designers get feedback on their work by having it reviewed by peers and experts. Design reviews take significant time and effort, but they’re quicker and less resource-intensive than full-scale modeling and simulation. But there’s still a rub; running a design review requires check-pointing the design, sending something out for review, and waiting for people (who are already busy with other tasks) to review the material, and then pulling all that feedback together. That represents a consider-able delay in a project schedule that’s already packed.

Ideally, we’d combine the ability to perform first-order analysis on the engineer’s desktop, allowing the evaluation of design tradeoffs with automated multi-domain design reviews to provide feedback in near real-time. That way, designers could minimize the risk and delays they experience with the ways we do things today. I think the biggest challenge designers face today is simply trying to learn everything they need to know and analyze to make sure their designs work as intended. We’d like to help ease that burden a bit.

Shaughnessy: I know you like to take devices apart around the house. Have you had any more epiphanies, like the one you shared with me at DesignCon about the new Ethernet switch and the need for designers to know how to do a “cost-reduced” design?

Westerhoff: As it turns out, I’ve been both taking things apart and putting things together. As far as taking things apart, I had an LED bulb fail in my home office and decided to take a look inside (Figure 1). It’s official: We’ve reached the point where we commonly have integrated circuits inside light bulbs! Thankfully, this particular bulb is a commodity item that doesn’t take up an IP address on my wireless network, although I’m sure that some bulbs do.

westerhoff-fig1.jpg

 To read this entire interview, which appeared in the November 2019 issue of Design007 Magazine, click here.

 

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