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Sierra Circuits will host a SI/PI workshop presented by DesignCon 2017 Engineer of the Year, Heidi Barnes, and Signal Integrity Application Scientist, Tim Wang-Lee, from Keysight Technologies on September 12-13, 2019 at Levi's Stadium in Santa Clara, California.
This intensive signal integrity and power integrity workshop provides you with the necessary skills to tackle everyday SI and PI challenges with Keysight PathWave advanced design system (ADS).
The SI session starts with the holistic approach to solve any signal integrity problems by using analysis techniques such as eye diagram, mixed-mode S-parameters, time domain reflectometry (TDR) and single pulse response. The session continues to exercise the techniques in design and exploration of single-ended and differential channels. Finally, the SI workshop concludes with EM model extraction and investigation of application and standards.
In the PI sessions, we cover the elegant flat impedance design technique and explore the cohesive ADS Power Integrity eco-system. In the process of PI eco-system simulations, you will use impedance vs. frequency data to create measured models, estimate decoupling capacitance, and debug noise ripple on a power rail.
The combination of lecture and hands-on exercises allows attendees to explore the presented topics in real-time while being mentored by an expert in the field. The hands-on approach allows you to gain confidence in your ability to apply these skills on your own, at your workplace. You will learn to design, simulate and troubleshoot most common signal integrity and power integrity related issues.
To book a spot or have more information, email Lucy at firstname.lastname@example.org.
Andy Shaughnessy, Design007 Magazine
We’re in the middle of show season, and it certainly “shows.” Thank you very much. I’m here all week. Don’t forget to tip your wait staff. This week, we published a variety of articles, columns, and news items, and much of it centered on trade shows. Technical Editor Dan Feinberg brings us a report from CES 2023. IPC announced the winners of the Best Technical Paper awards for IPC APEX EXPO 2023. And we have an interview with Altium’s Rea Callender about the company’s educational efforts at APEX and around the globe.
I-Connect007 Editorial Team
Altium keeps its eyes on the designers of the future. The company has been working with colleges and universities for years, providing free seats of Altium Designer for the next generation of PCB designers and design engineers. At IPC APEX EXPO 2023, Altium will be providing software for the finalists in the IPC Design Competition just as it did last year. They offer a variety of other educational programs as well, including Upverter classes and a design competition that aims to address environmental change. Here, Rea Callender, Altium’s VP of education, discusses its educational programs and plans for the week of the show.
Patrick Crawford, IPC
Last year, IPC held its first-ever design competition at IPC APEX EXPO in San Diego. PCB designers from around the world competed in a series of heats during the months before the show, culminating in a showdown on the show floor between the top three finalists. Rafal Przeslawski, now with AMD, took home the top prize last year. This year, the competition is back for its sophomore year. I asked Patrick Crawford, manager of design standards and related programs for IPC, to “layout” the details on the design contest, including lessons learned in 2022 and what’s new for the 2023 competition.