Martin Cotton’s Parting Shot


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Outspoken, controversial, but always enlightening and entertaining: Martin Cotton is a unique personality in the PCB industry. As Cotton says, “I’m a designer—look at my haircut!”

Cotton gave the keynote at the Institute of Circuit Technology’s 2018 Harrogate Seminar, challenging his audience to consider laminate dielectric properties in the context of power and cost in a presentation entitled “The Effect of the Dk of a PCB Laminate on the Cost-effectiveness of Office Rental Space. Intrigued?”

Reflecting on a career spanning over half a century, and having recently announced his retirement from the position of director OEM projects at Ventec (“The last great adventure for me in the PCB world”), Cotton recalled a conversation with Steve Lloyd, managing director of GSPK Circuits, that had resulted in him offering to demonstrate that the dielectric constant of a material could affect rental costs and power bills as a farewell presentation to his friends and colleagues in the ICT.

With reference to data sheet figures for high-speed laminates, Cotton explained that although dielectric constant (Dk) and dissipation factor (Df) were two fundamental characteristics that determined trace performance, designers tended to focus primarily on Df values and Dk was generally an afterthought, even though it had the most effect on the mechanicals and geometrics within a PCB. He commented that antenna designers would regularly ask for materials with very high Dk as a means of shrinking antenna sizes. Inversely, for an equivalent Df, would a very low Dk offer a means of reducing dielectric spacing whilst avoiding the need to force smaller trace geometries on manufacturing, and hence, improve yields? He demonstrated that by using a 2.8-Dk material in place of a 3.5-Dk material in a 55-ohm multilayer, 60 layers could be incorporated in the same overall thickness as a 48-layer board.

The thickness consideration was particularly relevant in mobile phone designs that had two PCBs stacked one above the other with a critical RF interference gap between where the objective was to reduce the overall package thickness whilst maintaining a minimum trace width of 30 microns. He commented that a 2.7-Dk material would assist in achieving this objective, and he showed examples of design stackups that met a 0.444-mm thickness target.

Returning to his primary theme of power and costs, Cotton considered the consequences of reducing trace width. For example, going from 5 to 4 mils increased trace resistance to the extent that 15% more power was required; hence, a 15% increase in the cost of basic system electricity. Thus, maintaining the 5-mil trace would provide this cost saving, and an increase in trace size would lower power requirements even further.

Cotton explained that in terms of the performance of a system as measured by a number of functions, cycle speed was the key driver—the faster the cycle speed, the more functions per product, rack, shelf, PCB, and trace. Apart from circuit driver technology, PCB materials had the biggest impact on cycle speed, and therefore, the number of functions. Trace resistance, and hence product or system resistance, introduced additional heat and slowed the system by preventing the cycle speed from working at optimum, as could be observed in eye diagrams. However, keeping trace resistance low enabled the correct cycle speed to be achieved, and the maximum number of functional traces equated to the maximum number of functions.

He went on to make some comparisons and calculations to illustrate influences and opportunities beginning with trace width. Clearly, the smaller the trace, the more traces per layer, and a reduction of trace width from 5 to 4 mils would enable a 20% increase in the number of traces per layer from, say, 1,000 to 1,200. Assuming a 20-layer board with four power and 16 interconnect layers, this would give an increase from 16,000 to 19,200 traces.

But using an ultra-low-Dk material could enable an additional six interconnect layers with 5-mil traces within the same overall thickness: 22 interconnect layers and 26,400 5-mil traces—approximately 26% more than the 20-layer 4-mil build. Clearly, there would be an increase in material and processing costs; Cotton estimated 11%, but this would be more than outweighed by the 26% increase in functionality, which could be reflected in the selling price.

Cotton continued the analysis in the context of telecommunications equipment and office rental costs and concluded that for the same footprint, the value point would be 31% higher. The same functionality could be achieved in 10 units of floor space as compared to 13 units originally, giving the option to sell the saved space or add further functionality to the installation. Alternatively, move to a smaller office!

In his final analysis, he listed the benefits that justified the choice of ultra-low Dk materials: lower power requirements, which he estimated at 15%, hence lower electricity costs and greener technology, lower heat requirements, and lower air conditioning costs together with simplified and reduced system solution costs and a smaller footprint.

He concluded by commenting that the race to integrate applied at all levels of design and engineering, and function integration lowered costs by the principle of more for less. Ultra-low Dk materials offered alternative packaging options as a consequence of enabling more layers in the Z-axis. He stressed that total costs must be taken into account, even when dealing with low volume products.

Did the audience believe that the rental and usage costs of an office were affected by Dk? Cotton spoke as an engineer fully trained in value analysis and engineering and kaizen and admitted that although he had rounded, abbreviated, and made shortcuts to show a good story, the outcome held true.

No one disagreed with him!

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