BGA Fanout Routing Overview


Reading time ( words)

PCB developers are deluged with new challenges caused by increasing density and smaller components. Ball grid arrays (BGAs) create particular challenges during layout, with hundreds of connections in just a few square centimeters. Fortunately, designers now have options for addressing these issues.

Fanout and Escape Routing

Because of the density and distance from the connection points, only the two outermost rows of a BGA can be connected directly to surface circuit traces. All other terminals of the BGA cannot be connected in a direct path on the surface.

Fanout and escape routing is integrated in many PCB design systems to enable further connections. In fanout and escape routing, the two outermost rows, and all other rows of a BGA, are automatically connected to the center of the terminals via a short circuit trace that is executed at a 45° angle. This provides a blind via that forms a direct connection to the next signal layer. Routing can be executed on the next signal layer.

Using via-in-pad eliminates the need for the additional trace to the center of the connections, thereby creating additional space for circuit traces. Therefore, with via-in-pad, the through contact can be placed directly at the terminal of the BGA.

During circuit board manufacturing, these through contacts will be filled with a non-conducting medium and cured. Later, the ends are metallized, planarized, and also over-contacted. This makes the surface of the via flat and can be used the contacts of the BGA. This solution can be used for both stacked and staggered microvias and/or blind vias. IPC-4761 describes how via-in-pads, for example filled and capped vias (IPC-4761 Type VII), are prepared. Despite the higher manufacturing costs, via in pads will always be preferred, because of the higher integration density of BGAs and their lower inductance at high frequencies (signal quality).

To read this entire article, which appeared in the August 2018 issue of Design007 Magazine, click here.

Share

Print


Suggested Items

Arlon Takes on High-Power Failure

04/02/2020 | Real Time with...IPC
In this video interview from IPC APEX EXPO, Pete Starkey and Dave Nelson, director of business development at Arlon Electronic Materials, explore causes of failure in high-power PCBs and explain how resin cracking during drilling can be overcoming using thermally conductive filled resin.

The Formation of the Printed Circuit Engineering Association

04/02/2020 | Patty Goldman, I-Connect007
Patty Goldman spoke with Gary Ferrari, FTG Corporation, at IPC APEX EXPO 2020 about the formation of the Printed Circuit Engineering Association, which—having been started two months ago—has attained lots of interest from the industry. The PCEA hopes to bring together designers, engineers, fabricators, assemblers through local chapters to focus mainly on education and learning.

DownStream: Smoothing out the Post-Processing Bumps

03/18/2020 | Real Time with...IPC
In this video interview from the show, Joe Clark, co-founder of DownStream Technologies, gives Guest Editor Kelly Dack an overview of the company and their innovative product line, which serves to smooth the bumps that can occur between source design output and manufacturing line input. As Joe explains, 2019 was a great year for the company, and he expects that trend to hold through 2020.



Copyright © 2020 I-Connect007. All rights reserved.