Show & Tell: IPC APEX EXPO 2018 is on the Books!


Reading time ( words)

I am home from another IPC APEX EXPO. I have been going to these things for more than 38 years, and I learn something each year.

I spent most of Monday attending the Design Forum, which is a set of classes specifically targeted at PCB designers. Up first was Dana Korf, an old hand at tooling and front-end engineering. He presented “Printed Circuit Board Factory 4.0,” a comprehensive program he and others are undertaking to develop a completely digital fabrication data package in a single .XML file, as outlined in Figure 1. The unfortunate truth is that less than 10% of all new orders arrive at the PCB fabricator’s facility with complete, accurate design data; most have missing or incorrect data. Another big issue is that a lot of the preliminary or front-end information is in the form of drawings and specifications that require reading and interpreting, and sometimes even further investigation, as it is often conflicting data. Dana wants all this data to be digital to drive a modern Industry 4.0 factory.

Dana went over the progress since the 1970s culminating in the current IPC-2581 standard, and additional software added to cover what the OEM is sending and what the factory needs. 

The digital modernization covered information for the BOM (ECAD and MCAD), mechanical fabrication, stackup, material requirements, impedance requirements, plating and surface finish, artwork, drawings, notes and requirements for acceptability. This information can support the requirements of the enterprise business system PLM/ERP. 

To read the full version of this article which originally appeared in the Show & Tell Magazine, click here.

Share


Suggested Items

Moving From 28 Gbps NRZ to 56 Gbps PAM-4: Is it a Free Lunch?

09/19/2018 | Yuriy Shlepnev, Simberian
The usual way of signaling through PCB interconnects is a two-level pulse, an encoding of 1s and 0s or bits, named NRZ (non-return-to-zero) or PAM-2 line code type. Increasing the data rate with the NRZ code type presents some obstacles. For a 28 Gbps NRZ signal, the bit time is about 35.7 ps with the main spectral lobe below 28 GHz. For a 56 Gbps NRZ signal, the bit time is about 17. 86 ps, with the main spectral lobe below 56 GHz. One can feel the problem already: Getting PCB interconnect analysis and measurements up to 56 GHz and beyond is very challenging, to say the least.

The Impact of PCB Dielectric Thickness on Signal Crosstalk

08/27/2018 | Chang Fei Yee, Keysight Technologies
Crosstalk is an unintentional electromagnetic (EM) field coupling between transmission lines on a PCB. This phenomenon becomes a major culprit in signal integrity (SI), contributing to the rise of bit error occurrence in data communications and electromagnetic interference (EMI). With the existence of mutual inductance and capacitance between two adjacent transmission lines on a PCB, crosstalk has become more severe due to the shorter signal rise/fall times at today’s higher data speed rates.

Advanced Stackup Planning with Impedance, Delay and Loss Validation

08/02/2018 | Yuriy Shlepnev, Simberian
A typical PCB design usually starts with the material selection and stackup definition—the stackup planning or design exploration stage. How reliable are the data provided by the material vendors and PCB manufacturers? Can we use these data to predict trace width and spacing for the target trace impedance or to calculate delays or evaluate the loss budget?



Copyright © 2018 I-Connect007. All rights reserved.