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Signal Integrity Software Inc. will present two complementary sessions focused on building IBIS-AMI models and how DDR5 AMI models can be applied to systems design. The sessions, titled “Building AMI Models for DDR5 Applications” and “Applying IBIS-AMI Techniques to DDR5 Analysis,” will be presented on Wednesday, January 31 and Thursday, February 1 at DesignCon 2018. DesignCon takes place January 30–February 1, 2018 at the Santa Clara Convention Center.
“We’re still in the early stages of applying IBIS-AMI models to DDR-based design, so flexibility in system-level analysis and modeling is crucial,” noted Barry Katz, SiSoft’s president and CTO. “There are multiple ways to analyze DDR interfaces for signal integrity and timing, and the preferred methodology will vary based on the controller being used. Similarly, we’re still experimenting with the feature set for DDR5 AMI models. That’s why we are particularly excited about combining SiSoft’s Quantum-SI and its configurable analysis methodology with MathWorks’ Simulink for AMI model development. We have created a flow where DDR5 silicon vendors can adjust their AMI models and system-level analysis methodology in real time to suit changing needs.”
SiSoft collaborates with customers and their suppliers to develop innovative solutions to the world’s toughest high-speed design problems. SiSoft accelerates design cycles through a combination of award-winning EDA simulation software, methodology training and consulting services. Quantum Channel Designer (QCD) is the industry’s premier channel simulator for the design and analysis of Multi-Gigabit serial links and a DesignVision Award Winner. Quantum-SI (QSI) is the leading solution for integrated signal integrity, timing and crosstalk analysis of high-speed parallel interfaces. SiSoft’s products automate comprehensive pre- and post-route analysis of high-speed interfaces, detailing a design’s operating voltage and timing margins. More information on SiSoft and our activities at DesignCon 2018 can be found at www.sisoft.com.
DesignCon is the world's premier conference for chip, board and systems design engineers in the high-speed communications and semiconductor communities. DesignCon, created by engineers for engineers, takes place annually in Silicon Valley and remains the largest gathering of chip, board and systems designers in the country. This three-day technical conference and expo combines technical paper sessions, tutorials, industry panels, product demos and exhibits from the industry's leading experts and solutions providers. More information is available at: www.designcon.com. DesignCon is organized by UBM plc. UBM is the largest pure-play B2B events organizer in the world. Our 3,750+ people, based in more than 20 countries, serve more than 50 different sectors. Our deep knowledge and passion for these sectors allow us to create valuable experiences which enable our customers to succeed. Please visit www.ubm.com for the latest news and information about UBM.