PCB Designers Notebook: Embedding Components, Part 2


Reading time ( words)

Note: Part 1 of this column appeared in the June 2017 issue of The PCB Magazine.

Technology and processes for embedding capacitor and inductor elements rely on several unique methodologies. Regarding providing capacitor functions, IPC-4821 defines two methodologies for forming capacitor elements within the PCB structure: laminate-based (copper-dielectric-copper) or planar process and non-laminate process using deposited dielectric materials.

Distributed (planar) capacitors

Considered the simplest solution and commonly used to replace discrete power supply decoupling capacitors the planar capacitors utilize closely spaced power and ground planes separated by a thin dielectric layer. The dielectric can be a layer of the glass-reinforced epoxy material, a thin layer of non-reinforced polymer, or a polymer sheet material filled with ceramic powder. This technique will provide significant capacitance and delivers very low inductance. The capacitance range for planar capacitors is 1pF to 1mF, dependent on the dielectric constant, material thickness and area.

Because the planar capacitance is proportional to the dielectric thickness between the power and ground planes, thin dielectrics are preferred. This will increase planar capacitance while reducing planar spreading inductance and minimizes overall board thickness. The reduction of planar spreading inductance also results in a lowering the impedance path while increasing the effectiveness of discrete capacitances.

The total capacitance of the power and ground pair is determined by the effective common (overlapping) area of the copper electrodes. This area, times the capacitance density, represents the total capacitance.

To read this entire article, which appeared in the June 2017 issue of The PCB Design Magazine, click here.

Share


Suggested Items

Part 2: EIPC’s 2018 Winter Conference in Lyon, Review of Day 1

02/19/2018 | Pete Starkey, I-Connect007
We continue with the rest of Pete Starkey’s report on Day 1 of the EIPC Winter Conference in Lyon, France. Included in this segment are presentations by Ventec, Ericsson, TTM and others, plus photos of their evening tour of Alstom.

Who Really Owns the PCB Layout? Part 2

02/07/2018 | Paul Taubman, Nine Dot Connects
In Part 1 of this series, Paul Taubman made the bold statement that the PCB layout is just as much a mechanical effort as it is an electrical one. In Part 2, he threads the needle, explaining why he believes that a PCB truly a mechatronic design, and why mechanical engineers may be more prepared to take on the PCB layout.

PCB Cooling Strategies, Part 1

01/19/2018 | Bin Zhou, EDADOC
With the development of communication and IT industries and the ever-increasing demand for information analysis, many chip makers have racked their brains trying to provide customers with better technology, such as increased computing power and storage capacity of chips as well as diversifying their product offerings.



Copyright © 2018 I-Connect007. All rights reserved.